MAX9176/MAX9177
670MHz LVDS-to-LVDS and
Anything-to-LVDS 2:1 Multiplexers
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Detailed Description
The MAX9176/MAX9177 are 670MHz, low-jitter, low-
skew 2:1 multiplexers ideal for protection switching,
loopback, and clock distribution. The devices feature
ultra-low 68ps(P-P) deterministic jitter that ensures reli-
able operation in high-speed links that are highly sensi-
tive to timing error.
The MAX9176 has fail-safe LVDS inputs and an LVDS
output. The MAX9177 has anything differential inputs
(CML/LVDS/LVPECL) and an LVDS output. The output
can be put into high impedance using the power-down
input. The MAX9176 features fail-safe circuits that drive
the output high when a selected input is open, undriv-
en and shorted, or undriven and terminated. The
MAX9177 has bias circuits that force the output high
when a selected input is open. The mux select and
power-down inputs are compatible with standard
LVTTL/LVCMOS logic.
The select and power-down inputs tolerate undershoot
of -1V and overshoot of VCC + 1V. The MAX9176/
MAX9177 are available in 10-pin MAX and 10-lead
thin QFN packages, and operate from a single 3.3V
supply over the -40
°C to +85°C temperature range.
Current-Mode LVDS Output
The LVDS output uses a current-steering configuration.
This approach results in less ground bounce and less
output ringing, enhancing noise margin and system
speed performance.
A differential output voltage is produced by steering
current through the parallel combination of the integrat-
ed differential output resistor and transmission line
impedance/termination resistor. When driving a 100
load, a differential voltage of 250mV to 475mV is pro-
duced. For loads greater than 100
, the output voltage
is larger, and for loads less than 100
, the output volt-
age is smaller. See the Differential Output Voltage vs.
Load Resistance curve in Typical Operating
Characteristics for more information. The output is
short-circuit current limited for single-ended and differ-
ential shorts.
MAX9176 Input Fail-Safe
The fail-safe feature of the MAX9176 sets the output
high when the differential input is:
Open
Undriven and shorted
Undriven and terminated
Without a fail-safe circuit, when the selected input is
undriven, noise at the input may switch the output and
it may appear to the system that data is being sent.
Open or undriven terminated input conditions can
occur when a cable is disconnected or cut, or when
the driver output is in high impedance. A shorted input
can occur because of a cable failure.
When the selected input is driven with a differential sig-
nal of
VID= 50mV to 1.2V within a voltage range of 0
to 2.4V, the fail-safe circuit is not activated. If the select-
ed input is open, undriven and shorted, or undriven and
terminated, an internal resistor in the fail-safe circuit
pulls both inputs above VCC - 0.3V, activating the fail-
safe circuit and forcing the output high (Figure 1).
Overshoot and Undershoot Voltage
Protection
The MAX9176/MAX9177 are designed to protect the
select and power-down inputs (SEL and PD) against
latchup due to transient overshoot and undershoot volt-
age. If the input voltage goes above VCC or below
GND by up to 1V, an internal circuit limits input current
to 1.5mA.
INPUTS
OUTPUT
(IN_+) - (IN_-)
(OUT+) - (OUT-)
≥ +50mV
H
≤ -50mV
L
-50mV < VID < +50mV
Indeterminate
MAX9177
Open
MAX9176
Open, undriven
short, or undriven
parallel termination
H
Table 1. Function Table
SEL
PD
OUT+, OUT-
HH
IN1+, IN1-
L or open
H
IN0+, IN0-
X
L or open
High impedance to ground
and 123
(typ) differential
output resistance
Table 2. Input Select and Power-Down
Function Table