參數(shù)資料
型號(hào): MAX9247ETM+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 3/17頁(yè)
文件大小: 0K
描述: IC SERIALIZER LVDS 48-TQFN
標(biāo)準(zhǔn)包裝: 2,500
功能: 串行器
數(shù)據(jù)速率: 840Mbps
輸入類型: 串行
輸出類型: LVDS
輸入數(shù): 18
輸出數(shù): 1
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFN-EP(6x6)
包裝: 帶卷 (TR)
MAX9247
27-Bit, 2.5MHz-to-42MHz
DC-Balanced LVDS Serializer
______________________________________________________________________________________
11
Transition Timing
The transition words require interconnect bandwidth
and displace control data. Therefore, control data is not
sampled (see Figure 9):
Two clock cycles before DE_IN goes high
During the video phase
Two clock cycles after DE_IN goes low
The last sampled control data are latched at the deserial-
izer control data outputs during the transition and video
phases. Video data are latched at the deserializer RGB
data outputs during the transition and control phases.
Applications Information
AC-Coupling Benefits
AC-coupling increases the common-mode voltage to
the voltage rating of the capacitor. Two capacitors are
sufficient for isolation, but four capacitors—two at the
serializer output and two at the deserializer input—pro-
vide protection if either end of the cable is shorted to a
high voltage. AC-coupling blocks low-frequency
ground shifts and common-mode noise. The MAX9247
serializer can also be DC-coupled to the MAX9248/
MAX9250 deserializers.
Figures 10 and 12 show an AC-coupled serializer and
deserializer with two capacitors per link. Figures 11 and
13 show the AC-coupled serializer and deserializer with
four capacitors per link.
Selection of AC-Coupling Capacitors
See Figure 14 for calculating the capacitor values for
AC-coupling depending on the parallel clock frequen-
cy. The plot shows capacitor values for two- and four-
capacitor-per-link systems. For applications using less
than 18MHz clock frequency, use 0.1F capacitors.
Frequency-Range Setting RNG[1:0]
The RNG[1:0] inputs select the operating frequency
range of the MAX9247 serializer. An external clock with-
in this range is required for operation. Table 3 shows
the selectable frequency ranges and corresponding
data rates for the MAX9247.
RNG1
RNG0
PARALLEL
CLOCK (MHz)
SERIAL-DATA RATE
(Mbps)
0
2.5 to 5
50 to 100
0
1
5 to10
100 to 200
1
0
10 to 20
200 to 400
1
20 to 42
400 to 840
Table 3. Parallel Clock Frequency Range
Select
Figure 9. Transition Timing
PCLK_IN
CNTL_IN
DE_IN
RGB_IN
= NOT SAMPLED BY PCLK_IN
CONTROL
PHASE
CONTROL
PHASE
TRANSITION
PHASE
TRANSITION
PHASE
VIDEO PHASE
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