參數(shù)資料
型號(hào)： MAX9272GTM+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 5/47頁(yè)
文件大?。?/td> 0K
描述： IC DSERIALIZER 28BIT GMSL 48TQFN
標(biāo)準(zhǔn)包裝： 43
系列： *
MAX9272
28-Bit GMSL Deserializer for Coax or STP Cable
13
Maxim Integrated
Pin Description (continued)
PIN
NAME
FUNCTION
5
LCCEN
Local Control-Channel Enable Input with Internal Pulldown to EP. LCCEN = high enables the control-
channel interface pins. LCCEN = low disables the control-channel interface pins and selects an
alternate function on the indicated pins (Table 13).
6, 48
AVDD
1.8V Analog Power Supply. Bypass AVDD to EP with 0.1FF and 0.001FF capacitors as close as
possible to the device with the smaller capacitor closest to AVDD.
7
IN+
Noninverting Coax/Twisted-Pair Serial Input
8
IN-
Inverting Coax/Twisted-Pair Serial Input
9
GPI
General-Purpose Input. The GMSL deserializer GPI (or INT) input follows GPI.
10
RX/SDA/EDC
Receive/Serial Data/Error Detection Correction. Function is determined by the state of LCCEN (Table 13).
RX/SDA (LCCEN = high): Input/output with internal 30kI pullup to IOVDD. In UART mode, RX/SDA
is the Rx input of the MAX9272’s UART. In the I2C mode, RX/SDA is the SDA input/output of the
MAX9272’s I2C master/slave. RX/SDA has an open-drain driver and requires a pullup resistor.
EDC (LCCEN = low): Input with internal pulldown to EP. Set EDC = high to enable error detection
correction. Set EDC = low to disable error detection correction.
11
TX/SCL/ES
Transmit/Serial Clock/Edge Select. Function is determined by the state of LCCEN (Table 13).
TX/SCL (LCCEN = high). Input/output with internal 30kI pullup to IOVDD. In UART mode, TX/SCL
is the Tx output of the MAX9272’s UART. In the I2C mode, TX/SCL is the SCL input/output of the
MAX9272’s I2C master/slave. TX/SCL has an open-drain driver and requires a pullup resistor.
ES (LCCEN = low): Input with internal pulldown to EP. When ES is high, PCLKOUT indicates valid
data on the falling edge of PCLKOUT. When ES is low, PCLKOUT indicates valid data on the rising
edge of PCLKOUT. Do not change the ES input while the pixel clock is running.
12
DVDD
1.8V Digital Power Supply. Bypass DVDD to EP with 0.1FF and 0.001FF capacitors as close as
possible to the device with the smaller value capacitor closest to DVDD.
13
PWDN
Active-Low Power-Down Input with Internal Pulldown to EP. Set PWDN low to enter power-down mode
to reduce power consumption.
14
ERR
Error Output. Open-drain data error detection and/or correction indication output with internal 60kI
pullup to IOVDD. ERR is an open-drain driver and requires a pullup resistor.
15
LOCK
Open-Drain Lock Output with Internal 60kI Pullup to IOVDD. LOCK = high indicates that PLLs are
locked with correct serial-word-boundary alignment. LOCK = low indicates that PLLs are not locked or
an incorrect serial-word-boundary alignment. LOCK remains low when the configuration link is active
or during PRBS test. LOCK is high impedance when PWDN = low. LOCK is an open-drain driver and
requires a pullup resistor.
16
DOUT27/VS1
Parallel Data/Vertical Sync 1 Output. Defaults to parallel data input on power-up.
Parallel data output when VS/HS encoding is disabled.
Decoded vertical sync for upper half of single output when VS/HS encoding is enabled (Table 2).
17
DOUT26/HS1
Parallel Data/Horizontal Sync 1 Output. Defaults to parallel data input on power-up.
Parallel data output when VS/HS encoding is disabled.
Decoded horizontal sync for upper half of single-output when VS/HS encoding is enabled (Table 2).
18
DOUT25/VS0
Parallel Data/Vertical Sync 0 Output. Defaults to parallel data input on power-up.
Parallel data output when VS/HS encoding is disabled.
Decoded vertical sync for lower half of single-output when VS/HS encoding is enabled (Table 2).
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9272GTM/V+ 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9272GTM/V+T 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9272GTM+ 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9272GTM+T 功能描述:串行器/解串器 - Serdes 1.5Gbps 28Bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9272GTV+ 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:28-Bit GMSL Deserializer for Coax or STP Cable
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