參數(shù)資料
型號(hào): MAX9376EUB+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 6/8頁(yè)
文件大小: 0K
描述: IC TRANSLATOR DUAL 10-UMAX
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
邏輯功能: 變換器
位數(shù): 2
輸入類(lèi)型: AnyLevel?
輸出類(lèi)型: LVDS,LVPECL
通道數(shù): 2
輸出/通道數(shù)目: 2
差分 - 輸入:輸出: 是/無(wú)
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-µMAX
包裝: 帶卷 (TR)
MAX9376
LVDS/Anything-to-LVPECL/LVDS Dual Translator
6
_______________________________________________________________________________________
Applications Information
LVPECL Output Termination
Terminate the MAX9376 LVPECL outputs with 50
Ω to
(VCC - 2V) or use equivalent Thevenin terminations.
Terminate OUT1 and
OUT1 with identical termination
on each for low output distortion. When a single-ended
signal is taken from the differential output, terminate
both OUT1 and
OUT1.
Ensure that output currents do not exceed the current
limits as specified in the
Absolute Maximum Ratings.
Under all operating conditions, the device’s total ther-
mal limits should be observed.
LVDS Output Termination
The MAX9376 LVDS outputs are current-steering
devices; no output voltage is generated without a termi-
nation resistor. The termination resistors should match
the differential impedance of the transmission line.
Output voltage levels are dependent upon the value of
the termination resistor. The MAX9376 is optimized for
point-to-point interface with 100
Ω termination resistors
at the receiver inputs. Termination resistance values
may range between 90
Ω and132Ω, depending on the
characteristic impedance of the transmission medium.
Supply Bypassing
Bypass VCC to ground with high-frequency surface-
mount ceramic 0.1F and 0.01F capacitors. Place the
capacitors as close to the device as possible with the
0.01F capacitor closest to the device pins.
Traces
Circuit board trace layout is very important to maintain
the signal integrity of high-speed differential signals.
Maintaining integrity is accomplished in part by reduc-
ing signal reflections and skew, and increasing com-
mon-mode noise immunity.
Signal reflections are caused by discontinuities in the
50
Ω characteristic impedance of the traces. Avoid dis-
continuities by maintaining the distance between differ-
ential traces, not using sharp corners or using vias.
Maintaining distance between the traces also increases
common-mode noise immunity. Reducing signal skew
is accomplished by matching the electrical length of
the differential traces.
VCM (MAX)
VCC
GND
VID
VCM (MIN)
VID
80%
OUT2 - OUT2
20%
80%
0V
tF
tR
DRV
OUT2
RL / 2
VOD
VOD(+)
VOD(-)
VOS
GND
CL
Figure 1. Input Definition
tPHL
tPLH
80%
20%
80%
DIFFERENTIAL OUTPUT
WAVEFORM
VID OR (VIH - VIL)
VOD OR (VOH - VOL)
+VOD OR +(VOH - VOL)
-VOD OR -(VOH - VOL)
0V DIFFERENTIAL
VOH
VOL
0V DIFFERENTIAL
IN
OUT
OUT - OUT
tF
tR
Figure 2. LVDS Output Load and Transition Times
Figure 3. Differential Input-to-Output Propagation Delay Timing
Diagram
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參數(shù)描述
MAX9377EUA 功能描述:轉(zhuǎn)換 - 電壓電平 RoHS:否 制造商:Micrel 類(lèi)型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
MAX9377EUA+ 制造商:Maxim Integrated Products 功能描述:ANYTHING-TO-LVPECL/LVDS TRANSLATOR WITH PIN-SELECTABLE DIVID - Rail/Tube
MAX9377EUA-T 功能描述:轉(zhuǎn)換 - 電壓電平 Anything-to-LVPECL/LVDS Translators with Pin-Selectable Divide-by-Four RoHS:否 制造商:Micrel 類(lèi)型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
MAX9378EUA 功能描述:轉(zhuǎn)換 - 電壓電平 RoHS:否 制造商:Micrel 類(lèi)型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
MAX9378EUA/GG8 制造商:Maxim Integrated Products 功能描述:ANYTHING-TO-LVPECL/LVDS TRANSLATOR WITH PIN-SELECTABLE DIVID - Rail/Tube