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參數(shù)資料
| 型號： | MAX9472EUD |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Multiple-Output Clock Generators with Dual PLLs and OTP |
| 中文描述： | 多輸出時鐘發(fā)生器的雙PLL和OTP |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 3400K |
| 代理商： | MAX9472EUD |
Detailed Description
The MAX9471/MAX9472 have two programmable frac-
tional-N feedback PLLs so that almost any frequencies
between 4MHz to 200MHz can be generated. The
MAX9471 provides four outputs: two for the PLLs and
two for the reference clock. The MAX9472 provides
three outputs: two for the PLLs and one for the refer-
ence clock. The crystal frequency can be between
5MHz and 30MHz. The internal VCXO has a fine-tuning
range of ±200ppm.
Power-Down
Driving
PD
low places the MAX9471/MAX9472 in
power-down mode.
PD
overrides all other functions,
setting all outputs to high impedance and shutting
down the two PLLs. Every output has an 80k
(typ)
internal pulldown resistor.
Voltage-Controlled Crystal Oscillator
(VCXO)
The MAX9471/MAX9472s’ internal VCXO produces a ref-
erence clock for the PLLs used to generate the output
clocks. The oscillator uses a crystal clock as the base
frequency reference and has a voltage-controlled tuning
input for micro adjustment in a range of ±200ppm. The
tuning voltage V
TUNE
can vary from 0V to 3V as shown in
Figure 1. The crystal should be AT cut and oscillate on
its fundamental mode with ±30ppm accuracy. The crys-
tal shunt capacitor should be less than 10pF, including
board parasitic capacitance. To achieve up to
±
200ppm
pullability, the crystal-loading capacitance should be
less than 14pF. The VCXO is a free-running oscillator. It
starts oscillating with an internal POR signal and can be
disabled by
PD
. VCXO settles at approximately 5ms at
power-on and 10μs at a change of the V
TUNE
voltage.
Choosing different C
1
and C
2
capacitors allows flexibility
for centering the various crystals. See the
Typical
Operating Characteristics
for an example.
To use the MAX9471/MAX9472 as a synthesizer with an
input reference clock, connect the input clock to X1 and
TUNE to V
DD
, and leave X2 unconnected. This configu-
ration is for applications where the micro tuning is not
needed, and there is a system reference clock available.
One-Time Programmable Memory
The MAX9471/MAX9472 feature a factory-configurable,
OTP memory for nonvolatile applications allowing for
simple and permanent clock generation. Contact the fac-
tory for presetting the MAX9471/MAX9472 to requested
frequencies.
Using OTP, the MAX9471/MAX9472 can be configured
to two different configurations. One configuration is to
have PLL1 set to any frequency between 4MHz to
200MHz and select the PLL2’s frequency by I
2
C
(MAX9471) or programmable pins. The second config-
uration is to preset the frequencies in PLL1 and PLL2 to
fixed values between 4MHz to 200MHz. In both cases,
the reference output is available, but it can be disabled
by OTP. At power-up, all the outputs are enabled.
Frequency Selection of CLK2 Output
The OTP ROM can set PLL2’s output to be selectable
from a group of frequencies that are common for MPEG
video and audio applications. The frequency selection
can be done by the FS_ inputs or through the I
2
C inter-
face (MAX9471). For the MAX9471, pull FS2 high (Table
1) to select the PLL2 frequency through the I
2
C interface.
Otherwise, the frequencies are selected according to
Table 2. For the MAX9471, Table 3 shows the mappings
for I
2
C programming.
Serial Interface (MAX9471)
The MAX9471 can be programmed through a 2-wire,
I
2
C-compatible serial interface. The device is activated
after power-up and FS2 = high. The device operates as
a slave that sends and receives data through clock line
SCL and data line SDA for bidirectional communication
with the master. A master (typically a microcontroller)
initiates all data transfers to and from the MAX9471 and
M
Multiple-Output Clock Generators with
Dual PLLs and OTP
_______________________________________________________________________________________
7
27.0054
26.9946
-200ppm
3V
V
TUNE
0
+200ppm
27.00
V
(
Figure 1. VCXO Tuning Range for a 27MHz Crystal
FS2
MODE
Low or open
High
Pin programmable
I
2
C enabled
Table 1. Mode Selection by FS2
(MAX9471 Only)
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參數(shù)描述 |
|---|---|
| MAX9476EUG | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 35.328MHz Clock Synthesizer RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX9476EUG-T | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 35.328MHz Clock Synthesizer RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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