參數(shù)資料
型號: MAX975EUA+T
廠商: Maxim Integrated Products
文件頁數(shù): 12/17頁
文件大?。?/td> 0K
描述: IC COMPARATOR SNGL 8-UMAX
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 通用
元件數(shù): 1
輸出類型: CMOS,滿擺幅,TTL
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.25 V
電壓 - 輸入偏移(最小值): 2mV @ 5V
電流 - 輸入偏壓(最小值): 0.1µA @ 5.25V
電流 - 靜態(tài)(最大值): 500µA
CMRR, PSRR(標(biāo)準(zhǔn)): 82dB CMRR,90dB PSRR
傳輸延遲(最大): 820ns
磁滯: 4mV
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
安裝類型: 表面貼裝
包裝: 帶卷 (TR)
MAX975/MAX977
Single/Dual, +3V/+5V Dual-Speed
Comparators with Auto-Standby
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.7V to +5.25V, specifications are for high-speed mode, TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
CONDITIONS
(Note 9)
10mV overdrive (Note 10)
s
(Note 8)
3
tASB
Auto-Standby Timeout
tASBE
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
Auto-Standby Enable Time
s
24
tASD
Auto-Standby Wake-Up Time
10mV overdrive (Note 11)
(Note 12)
s
1.6
tPWD
Auto-Standby Wake-Up Input
or LP Pulse Width
s
0.8
tASCD
Auto-Standby Comparator
Disable
(Note 13)
s
3
tLPE
Low-Power Enable Time
(Note 14)
s
1.1
4
tHSE
High-Speed Enable Time
(Note 15)
s
0.7
tLPCD
Low-Power Comparator Disable
(Note 16)
ns
20
tLPSH
Low-Power STAT_ High
AUTO-STANDBY/LOW-POWER TIMING (Note 7; Figure 2)
Note 7:
Timing specifications are guaranteed by design.
Note 8:
Set by 1000pF external capacitor at the STO_ pin. tASB is defined as the time from last input transition to STAT_ = high.
Does not include time to go into standby condition (tASBE).
Note 9:
tASBE is defined as the time from when STAT_ goes high to when the supply current drops to 5
A.
Note 10: tASD is defined as the time from the last input transition to when STAT_ goes low. The comparator is in high-speed mode
before STAT_ is low.
Note 11: tPWD is defined as the minimum input or LP pulse width to trigger fast-mode operation from auto-standby.
Note 12: tASCD is defined as the time from the last input transition to when the supply current increases to 300
A.
Note 13: tLPE is defined as the time from when LP is driven high to when the supply current drops to 5
A.
Note 14: tHSE is defined as the time from when LP goes low to when STAT goes low. The comparator is in high-speed mode before
STAT_ is low.
Note 15: tLPCD is defined as the time from when LP goes low to when the supply current increases to 300
A.
Note 16: tLPSH is defined as the time from when LP goes high to when STAT_ goes high.
ms
510
16
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