參數(shù)資料
型號(hào): MAX9961BDCCQ-D
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi): 比較器
英文描述: Dual, Low-Power, 500Mbps ATE Drivers/Comparators with 2mA Load
中文描述: DUAL COMPARATOR, 100000 uV OFFSET-MAX, 2.2 ns RESPONSE TIME, PQFP100
封裝: 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, TQFP-100
文件頁(yè)數(shù): 15/30頁(yè)
文件大?。?/td> 740K
代理商: MAX9961BDCCQ-D
MAX9961/MAX9962
Dual, Low-Power, 500Mbps
ATE Drivers/Comparators with 2mA Load
22
______________________________________________________________________________________
Active Load
The active load consists of linearly programmable
source and sink current sources, a commutation buffer,
and a diode bridge (see the Functional Diagram).
Analog control inputs LDH_ and LDL_ program the sink
and source currents, respectively, within the 0 to 2mA
range. Analog reference input COM_ sets the commu-
tation buffer output voltage. The source and sink nam-
ing convention is referenced to the device under test.
Current out of the MAX9961/MAX9962 constitutes sink
current while current into the MAX9961/MAX9962 con-
stitutes source current.
The programmed source (low) current loads the device
under test when VDUT_ > VCOM_. The programmed sink
(high) current loads the device under test when VDUT_
< VCOM_.
The GS input allows a single level-setting DAC, such as
the MAX5631 or MAX5734, to program the MAX9961/
MAX9962s’ active load, driver, comparator, and
clamps. Although all the DAC levels typically are offset
by VGS, the operation of the MAX9961/MAX9962s’
ground-sense input nullifies this offset with respect to
the active-load currents. Connect GS to the ground ref-
erence used by the DAC. (VLDL_ - VGS) sets the source
current by +400A/V. (VLDH_ - VGS) sets the sink cur-
rent by -400A/V.
The high-speed differential input LDEN_ and 2 bits of
the control word, LDCAL and LLEAK, control the load
(Table 4). When the load is enabled, the internal source
and sink current sources connect to the diode bridge.
When the load is disabled, the internal current sources
shunt to ground and the top and bottom of the bridge
float (see the Functional Diagram). LLEAK places the
load into low-leakage mode. LLEAK overrides LDEN_
and LDCAL. See the Low-Leakage Mode section for
more detailed information.
Load Calibration Enable, LDCAL
The LDCAL signal enables the load independently of
the state of LDEN_. In some tester configurations, the
load enable is driven with the complement of the driver
high-impedance signal (RCV_), so disabling the driver
enables the load and vice versa. LDCAL allows the
load and driver to be simultaneously enabled for diag-
nostic purposes in this tester configuration (Table 4).
Table 4. Active Load Programming
EXTERNAL
CONNECTIONS
INTERNAL
CONTROL
REGISTER
LDEN_
LDCAL LLEAK
MODE
00
0
Normal operating mode,
load disabled
10
0
Normal operating mode,
load enabled
X1
0
Load enabled for
diagnostics
X
1
Low-leakage mode
CLV_
CHV_
DUT_
CH_
NCH_
VEE
8mA
CL_
NCL_
OPTIONAL
4 x 50
VCCO_
MAX9961
MAX9962
Figure 3. Open-Collector Comparator Outputs
相關(guān)PDF資料
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