參數(shù)資料
型號(hào): MAXQ2010-RFX+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 22/34頁(yè)
文件大?。?/td> 0K
描述: IC MCU 16BIT 64KB FLASH 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
系列: MAXQ®
核心處理器: RISC
芯體尺寸: 16-位
速度: 10MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LCD,POR,PWM,WDT
輸入/輸出數(shù): 55
程序存儲(chǔ)器容量: 64KB(32K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
MAXQ2010
16-Bit Mixed-Signal Microcontroller
with LCD Interface
______________________________________________________________________________________
29
dividers to control display contrast, using either VDDIO
or an external voltage. If desired, contrast can also be
controlled with an external resistance. The features of
the LCD controller include the following:
Automatic LCD segment and common-drive signal
generation
Four display modes supported:
Static (COM0)
1/2 duty multiplexed with 1/2 bias voltages (COM[0:1])
1/3 duty multiplexed with 1/3 bias voltages (COM[0:2])
1/4 duty multiplexed with 1/3 bias voltages (COM[0:3])
Up to 43 segment outputs and four common-signal
outputs
21 bytes (168 bits) of display memory
Flexible LCD clock source, selectable from 32kHz or
HFClk/512
Adjustable frame frequency
Internal voltage-divider resistors eliminate require-
ment for external components
Internal adjustable resistor allows contrast adjustment
without external components
A simple LCD-segmented glass interface example
demonstrates the minimal hardware required to inter-
face to a MAXQ2010 microcontroller. A two-character
LCD is controlled, with each character containing
seven segments plus decimal point. The LCD controller
is configured for 1/2 duty-cycle operation, meaning the
active segment is controlled using a combination of
segment signals and COM0 or COM1 signals are used
to select the active display. See Figure 8.
In-Circuit Debug
Embedded debugging capability is available through
the JTAG-compatible TAP. Embedded debug hardware
and embedded ROM firmware provide in-circuit debug-
ging capability to the user application, eliminating the
need for an expensive in-circuit emulator. Figure 9
shows a block diagram of the in-circuit debugger. The
in-circuit debug features include the following:
A hardware debug engine.
A set of registers able to set breakpoints on register,
code, or data accesses.
A set of debug service routines stored in the utility
ROM.
The embedded hardware debug engine is an indepen-
dent hardware block in the microcontroller. The debug
engine can monitor internal activities and interact with
selected internal registers while the CPU is executing
user code. Collectively, the hardware and software fea-
tures allow two basic modes of in-circuit debugging:
Background mode allows the host to configure and
set up the in-circuit debugger while the CPU contin-
ues to execute the application software at full speed.
Debug mode can be invoked from background mode.
Debug mode allows the debug engine to take control
of the CPU, providing read/write access to internal reg-
isters and memory, and single-step trace operation.
SEG0
SEG1
SEG2
SEG3
COM0
SEG[0:7]
CONNECTED TO DARK GREY SEGMENTS
COM1
CONNECTED TO LIGHT GREY SEGMENTS
SEG4
SEG5
SEG6
SEG7
MAXQ2010
Figure 8. Two-Character, 1/2 Duty, LCD Interface Example
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