參數(shù)資料
型號: MAXQ3120-FFN+
廠商: Maxim Integrated Products
文件頁數(shù): 28/33頁
文件大小: 0K
描述: IC MCU 32KB FLASH 80-MQFP
標準包裝: 66
系列: MAXQ®
核心處理器: RISC
芯體尺寸: 16-位
速度: 8MHz
連通性: UART/USART
外圍設(shè)備: LCD,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-BQFP
包裝: 托盤
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
4
_____________________________________________________________________
Note 1: Specifications to -40°C are guaranteed by design and not production tested. All typical values are guaranteed by design
characterization and are not production tested.
Note 2: Tested with TA = +25°C, DVDD = 3.3V, and all peripherals inactive except for port pins.
Note 3: These numbers are guaranteed by design and are not tested.
Note 4: Can be calculated as (fHFXIN / 6).
Note 5: Can be calculated as 6 / (fHFXIN x CIN).
Note 6: Can be calculated as 12 / (fHFXIN x CIN).
Note 7: Assumes that no external components are connected to VLCD, VLCD1, VLCD2, or VADJ.
ELECTRICAL CHARACTERISTICS (continued)
(DVDD, AVDD = VRST to 3.6V, VREF = 1.25V (external), fHFXIN = 8MHz, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INTERNAL REFERENCE
Reference Output Voltage
1.25
V
±120
Reference-Output Temperature
Coefficient
With VREF bandgap trimming
(ATRM[4:0] = 01111b)
±35
ppm/°C
Load Regulation
IREF = ±2A, CL = 12pF
±50
±500
V/A
LCD INTERFACE
LCD Reference Voltage
VLCD
DVDD
V
LCD Bias Voltage 1
VLCD1
Guaranteed by design
VADJ + 2/3
(VLCD - VADJ)
V
LCD Bias Voltage 2
VLCD2
Guaranteed by design
VADJ + 1/3
(VLCD - VADJ)
V
LCD Adjustment Voltage (Note 7)
VADJ
Guaranteed by design
0
0.4 x
VLCD
V
LCD Bias Resistor
RLCD
20
k
LCD Adjust Resistor
RLADJ
LRA4:LRA0 = 0
40
k
Segment is driven at VLCD; VLCD = 3V,
ISEGxx = -3A, guaranteed by design
VLCD -
0.02
VLCD
V
Segment is driven at VLCD1; VLCD1 = 2V,
ISEGxx = -3A, guaranteed by design
VLCD1 -
0.02
VLCD1
V
Segment is driven at VLCD2; VLCD2 = 1V,
ISEGxx = -3A, guaranteed by design
VLCD2 -
0.02
VLCD2
V
LCD Segment Voltage
VSEGxx
Segment is driven at VADJ; VADJ = 0V,
ISEGxx = +3A, guaranteed by design
VADJ
0.1
V
CLOCK SOURCE
External Crystal Frequency
fHFXIN
18
MHz
REAL-TIME CLOCK
RTC Input Frequency
f32KIN
32kHz watch crystal
32.768
kHz
JTAG/FLASH PROGRAMMING
JTAG Clock Rate
fTCK
sysclk / 8
Mass erase
904
Flash Erase Time
Page erase
313
ms
Flash Programming Time
17
s
Write/Erase Cycles
1,000,000
Cycles
Data Retention
20
Years
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