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| 型號： | MAXQ7670AATL/V+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 13/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU W/12BIT ADC 40TQFN-EP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MAXQ® |
| 核心處理器： | RISC |
| 芯體尺寸： | 16-位 |
| 速度： | 16MHz |
| 連通性： | CAN，SPI |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 7 |
| 程序存儲器容量： | 64KB（32K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 1K x 16 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.25 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 包裝： | 管件 |
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MAXQ7670A
Microcontroller with 12-Bit ADC,
PGA, 64KB Flash, and CAN Interface
20
______________________________________________________________________________________
Input Impedance
The input-capacitance charging rate determines the
time required for the T/H to acquire an input signal. The
required acquisition time lengthens with the increase of
the input signals source resistance. Any source below
5k
does not significantly affect the ADC’s perfor-
mance. A high-impedance source can be accommo-
dated by placing a 1F capacitor between the input
channel and AGND. The combination of analog-input
source impedance and the capacitance at the analog
input creates an RC filter that limits the analog-input
bandwidth.
Controlling ADC Conversions
Use the following methods to control the ADC conver-
sion timing:
1) Software register bit control
2) Continuous conversion
3) Internal timer (T0)
4) External input through ADCCNV
Refer to the
MAXQ7670 User’s Guide for more detailed
information on the ADC and mux.
POR and Brownout
The MAXQ7670A operates from a single, external +5V
supply connected to the DVDDIO. DVDDIO is the sup-
ply rail for the digital I/O and the supply input for both
integrated linear regulators. The +3.3V linear regulator
powers AVDD, while the +2.5V linear regulator powers
DVDD. Alternatively, connect REGEN2 to DVDDIO and
apply external power supplies to AVDD and DVDD.
Power supplies DVDDIO, DVDD, and AVDD each
include a brownout monitor that alerts the C through
an interrupt when the corresponding supply voltages
drop below a defined threshold. This condition is gen-
erally referred to as brownout interrupt (BOI). Enable
BOI by setting the VABE, VDBE, and VIBE bits in the
APE register. By continually checking for low supply
voltages, appropriate action can be taken for brownout
conditions.
Startup Using Internal Regulators
Once the +5V DVDDIO supply reaches approximately
1.25V, the +2.5V linear regulator turns on and DVDD
begins ramping. Between the DVDD levels of 1V and
the reset threshold, the DVDD monitor holds RESET
low. DVDD releases RESET after reaching the reset
threshold. The MAXQ7670A jumps to the reset vector
location (8000h in the utility ROM). During this time,
DVDD finishes ramping to its nominal voltage of +2.5V.
During this POR time, the software-enabled +3.3V lin-
ear regulator remains off. Turn on the +3.3V linear regu-
lator after the MAXQ7670A has completed its bootup
routines and is running application code. To turn on the
+3.3V regulator, set the LRAPD bit in the APE register
to 0. The AVDD supply begins ramping to its nominal
voltage of +3.3V.
Brownout Detectors
The MAXQ7670A features brownout monitors for the +5V
DVDDIO, +3.3V AVDD, and +2.5V DVDD power sup-
plies. When enabled, these monitors generate interrupts
when DVDDIO, AVDD, or DVDD fall below their respec-
tive brownout thresholds. Monitoring the supply rails
alerts the C to brownout conditions so appropriate
action can be taken. Under normal conditions the DVDDIO
brownout monitor signals a falling +5V supply before
the DVDD or AVDD brownout monitors indicate that the
+2.5V or +3.3V are falling. The exceptions to this condi-
tion are:
If either DVDD or AVDD are externally powered and
the source of power is removed
If there is some type of device failure that pulls the reg-
ulator outputs low without affecting the +5V DVDDIO
supply
SAR CYCLE
PGA = 1V/V
SAR CYCLE
PGA = 16V/V
SAR TRACK
HOLD AND SAR CONVERT
PGA TRACK
PGA HOLD, SAR TRACK
HOLD AND SAR CONVERT
3 SCLK
13 SCLK
7.5 SCLK
6 SCLK
13 SCLK
Figure 5. Conversion Timing Differences Between Gain = 1V/V and Gain = 16V/V
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAXQ7670ATL/V+ | 功能描述:16位微控制器 - MCU MCU w/12-Bit ADC PGA 64KB Flash & CAN Int RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MAXQ7670ATL/V+T | 功能描述:16位微控制器 - MCU MCU w/12-Bit ADC PGA 64KB Flash & CAN Int RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MAXQ7670ATL+ | 功能描述:16位微控制器 - MCU MCU w/12-Bit ADC PGA 64KB Flash & CAN Int RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MAXQ7670ATL+T | 功能描述:16位微控制器 - MCU MCU w/12-Bit ADC PGA 64KB Flash & CAN Int RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MAXQ7670EVKIT+ | 功能描述:開發(fā)板和工具包 - 其他處理器 MAXQ7670 Eval Kit RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
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