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參數(shù)資料
| 型號(hào)： | MB3785A |
| 廠商： | Fujitsu Limited |
| 英文描述： | Switching Regulator Controller (4 Channels plus High-Precision, High-Frequency Capabilities) |
| 中文描述： | 開關(guān)穩(wěn)壓器控制器（4通道加高精度，高頻率功能） |
| 文件頁數(shù)： | 3/29頁 |
| 文件大?。?/td> | 293K |
| 代理商： | MB3785A |
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3
MB3785A
I
PIN DESCRIPTION
(Continued)
Pin No.
Symbol
I/O
Description
CH1
1
Ca1
—
CH1 output transistor OFF-current setting pin. Insert a capacitor between
the Ca1 and the Cb1 pins, then set the output transistor OFF-current.
48
Cb1
—
7
+IN1(E)
I
CH1 error amp non-inverted input pin.
6
–IN1(E)
I
CH1 error amp inverted input pin.
5
FB1
O
CH1 error amp output pin.
8
–IN1(C)
I
CH1 comparator inverted input pin.
4
DTC1
I
CH1 dead time control pin.
47
VE1
I
CH1 output current setting pin.
46
OUT1
O
CH1 totem-pole output pin.
CH2
3
Ca2
—
CH2 output transistor OFF-current setting pin. Insert a capacitor between
the Ca2 and the Cb2 pins, then set the output transistor OFF-current.
2
Cb2
—
12
+IN2(E)
I
CH2 error amp non-inverted input pin.
11
–IN2(E)
I
CH2 error amp inverted input pin.
10
FB2
O
CH2 error amp output pin.
13
–IN2(C)
I
CH2 comparator inverted input pin.
9
DTC2
I
CH2 dead time control pin.
43
VE2
I
CH2 output current setting pin.
44
OUT2
O
CH2 totem-pole output pin.
CH3
34
Ca3
—
CH3 output transistor OFF-current setting pin. Insert a capacitor between
the Ca3 and the Cb3 pins, then set the output transistor OFF-current.
35
Cb3
—
25
+IN3(E)
I
CH3 error amp non-inverted input pin.
26
–IN3(E)
I
CH3 error amp inverted input pin.
27
FB3
O
CH3 error amp output pin.
24
–IN3(C)
I
CH3 comparator inverted input pin.
28
DTC3
I
CH3 dead time control pin.
41
VE3
I
CH3 output current setting pin.
40
OUT3
O
CH3 totem-pole output pin.
CH4
36
Ca4
—
CH4 output transistor OFF-current setting pin. Insert a capacitor between
the Ca4 and the Cb4 pins, then set the output transistor OFF-current.
37
Cb4
—
30
+IN4(E)
I
CH4 error amp non-inverted input pin.
31
–IN4(E)
I
CH4 error inverted input pin.
32
FB4
O
CH4 error amp output pin.
29
–IN4(C)
I
CH4 comparator inverted input pin.
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