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參數(shù)資料
| 型號(hào)： | MB40568 |
| 廠商： | Fujitsu Limited |
| 英文描述： | A/D Converter (1-channel, 8-bit low-power model with built-in clamp circuit) |
| 中文描述： | A / D轉(zhuǎn)換（1通道，8位低功耗內(nèi)置鉗位電路模型） |
| 文件頁(yè)數(shù)： | 3/24頁(yè) |
| 文件大?。?/td> | 175K |
| 代理商： | MB40568 |
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3
MB40568
(Continued)
Pin no.
Symbol
Function
DIP
SOP
17
17
V
CLMP
Clamp voltage output pin
A capacitor of at least 1
μ
F should be connected between this pin
and the V
OUTC
pin.
Should be left open if the clamp circuit is not used.
18
18
V
INA
Analog signal input pin
19
—
V
RB
Analog reference voltage pin
In the DIP model, this pin is internally connected to the reference
circuit.
Always be sure that a capacitor is connected immediately next to the
IC, between this pin and the ground. The capacitor must be at least
1
μ
F with excellent frequency characteristics.
Reference voltage monitor pin
Set to the midpoint of resistance between V
CCA
and V
RB
.
Should be left open in normal use.
—
19
V
RM
—
20
V
REF
Reference voltage output pin
Should be left open when no reference voltage source is used.
—
21
V
RB
Analog reference voltage input pin
When an internal reference voltage source is used, this pin should
be shorted to the V
REF
pin. In this case, always be sure that a
capacitor is connected immediately next to the IC, between this pin
and the ground. The capacitor must be at least 1
μ
F with excellent
frequency characteristics.
When an external reference voltage source is used, this pin will
carry a current of up to 8.5 mA, therefore it is necessary to use a
voltage source with sufficient sync capacity.
A capacitor connection should also be used similar to that used with
internal reference voltage sources.
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