參數(shù)資料
型號(hào): MB814405C-60
廠商: Fujitsu Limited
英文描述: CMOS 1M ×4 BIT Hyper Page Mode Dynamic RAM(CMOS 1M ×4 位超級(jí)頁(yè)面存取模式動(dòng)態(tài)RAM)
中文描述: 的CMOS 100萬(wàn)× 4位超頁(yè)模式動(dòng)態(tài)RAM的CMOS(100萬(wàn)× 4位超級(jí)頁(yè)面存取模式動(dòng)態(tài)內(nèi)存)
文件頁(yè)數(shù): 18/30頁(yè)
文件大?。?/td> 372K
代理商: MB814405C-60
18
MB814405C-60/MB814405C-70
Fig. 11 – HYPER PAGE MODE READ CYCLE (WE CONTROLLED)
RAS
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
CAS
WE
DQ
(Input)
A
0
to A
9
V
OH
V
OL
DQ
(Output)
V
IH
V
IL
OE
DESCRIPTION
The hyper page mode of operation permits faster successive memory operations at multiple column locations of the same row
address. This operation is performed by strobing in the row address and maintaining RAS at a Low level and WE at a High level
during all successive memory cycles in which the row address is latched. The address time is determined by t
CAC
, t
AA
, t
CPA
, or t
OEA
,
whichever one is the latest in occurring.
To obtain a high impedance state, confirm either of the following conditions, OE set to a high level or WE set to a low level after
CAS set to a high level or RAS and CAS set to a high level.
“H” or ”L”
Valid Data
During one cycle is achieved, the input/output timing apply the same manner as the former cycle.
t
RASP
t
ASC
t
RCS
t
RHCP
t
RP
ROW
ADD
COL
ADD
t
CAS
t
RSH
t
HPC
t
CAS
t
DZC
t
CAH
t
RAH
t
ASC
t
CAH
t
ASC
t
RCH
t
CAC
t
AA
t
RAL
HIGH-Z
HIGH-Z
t
OFF
t
OH
t
OEZ
t
OED
t
OH
t
OH
t
AA
t
CAC
t
AA
t
OEA
t
DZO
t
ON
t
RAC
t
OFR
t
RCS
t
RCH
t
WPZ
t
RCH
t
WEZ
t
CAC
t
ON
t
WPZ
HIGH-Z
t
ON
t
WEZ
t
WPZ
t
CDD
t
WED
t
WEZ
t
ON
t
AR
t
RCS
COL
ADD
t
CRP
t
ASR
t
CSH
t
RCD
t
CAS
t
CAL
t
CAH
t
RDD
COL
ADD
相關(guān)PDF資料
PDF描述
MB814405C-70 CMOS 1M ×4 BIT Hyper Page Mode Dynamic RAM(CMOS 1M ×4 位超級(jí)頁(yè)面存取模式動(dòng)態(tài)RAM)
MB814405D-60 1M ×4BIT Hyper Page Mode Dynamic RAM(CMOS 1M ×4 位超級(jí)頁(yè)面存取模式動(dòng)態(tài)RAM)
MB814405D-60L 1M ×4BIT Hyper Page Mode Dynamic RAM(CMOS 1M ×4 位超級(jí)頁(yè)面存取模式動(dòng)態(tài)RAM)
MB814405D-70 1M ×4BIT Hyper Page Mode Dynamic RAM(CMOS 1M ×4 位超級(jí)頁(yè)面存取模式動(dòng)態(tài)RAM)
MB814405D-7OL 1M ×4BIT Hyper Page Mode Dynamic RAM(CMOS 1M ×4 位超級(jí)頁(yè)面存取模式動(dòng)態(tài)RAM)
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