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參數(shù)資料
| 型號： | MB86435PFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | RES 360 OHM 1/16W 5% 0402 SMD |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 17/36頁 |
| 文件大?。?/td> | 610K |
| 代理商： | MB86435PFV |
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17
MB86435
Table 5 Microphone Amp Characteristics
(2) Accessory Input
Direct input from the TAUD to the codec unit is possible through SW5, without passing through the microphone
amp. Care must be taken with the input signal in this case, however, because input resistance is not at high-
impedance level.
Microphone amp output may be added to the signal by using switching controls.
In this case, the result will be at the additional output level.
In addition, SW10 and SW11 may be used to transmit digital data from the TAUD to EXSD and DSCK, allowing the
sending of fax or PC data without modification.
3. Analog Output
The MB86435 has a total of four analog output circuits, including the three speaker drive circuits (receiver, earphone
and tone) and the accessory output.
(1) Speaker Drive Amp
The speaker drive amps include two circuits (receiver and tone) with BTL output and one system (earphone) with
single output. Because the speaker amp requires relatively high levels of power, it is connected to speaker selection
switches (sw6-sw9) for power-down mode selection.
Two systems (receiver and earphone) have fixed gain levels, while the other system (tone) allows gain adjustment
by means of external resistors.
Table 6 Speaker Drive Amp Output Standards
*1:
*2:
Dynamic-type speaker
Piezoelectric-ceramic type speaker
Parameter
Characteristics (typ)
0 to 35 dB
50 k
0.75 V
OP
Gain measurement range
Minimum load level
Maximum output level
Parameter
Receiver speaker amps
(EAR, XEAR)
BTL
32
(typ)
2.8 k
(typ)
70 nF
–4.3 dB
(between EAR-XEAR)
6.4 mW (min)
Earphone speaker amp
(JEAR)
Single
32
(typ)
2.8 k
(typ)
70 nF
–2.5 dB/–8.5 dB
(JEAR)
2 mW (min)
Tone speaker amps
(TONE, XTONE)
BTL
25
(typ)
2.8 kW (typ)
70 nF
–5 to 20 dB
(between TONE-XTONE)
10 mW (min)
Output type
Load resistance *
1
Load resistance *
2
Load capacity *
2
Final stage gain
Maximum output power
SGC
(Inside IC)
TAUD
EXSD
DSCK
-
+
0dB
SW5
SW10
SW11
CODEC
TAUD, EXSD, and DSCK contain no digital buffers. If not used,
TAUD, EXSD and DSCK should be connected to SGC.
Note:
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