- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377894 > MB86603 (FUJITSU LTD) Communication Control SCSI-II Protocol Controller(通信控制SCSI-II協(xié)議控制器) PDF資料下載
參數(shù)資料
| 型號： | MB86603 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | Communication Control SCSI-II Protocol Controller(通信控制SCSI-II協(xié)議控制器) |
| 中文描述： | SCSI BUS CONTROLLER, PQFP176 |
| 封裝： | PLASTIC, SQFP-176 |
| 文件頁數(shù)： | 10/58頁 |
| 文件大?。?/td> | 401K |
| 代理商： | MB86603 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁
10
MB86603
2. MPU Interface
(Continued)
Pin No.
Pin Symbol*
Pin Name
I/O
Function
139
CS0
Chip
Select 0
I
This is used for signals for the MPU to select the SPC as
the I/O device.
The signal is Active Low.
140
CS1
Chip
Select 1
I
This is used for select signals for the MPU to input and
output DMA-bus data via the SPC.
The signal is Active Low.
163 to 161,
159 to 155
D15 to D8
Data 15 to Data 8
I/O
These are used for the upper-byte and parity-bit signals of
the data bus.
When the CS0 input is valid, these pins serve as I/O ports for
the registers in the SPC.
When the CS1 input is valid, these pins serve as data I/O ports
for the DMA bus.
164
UDP
Upper Data Parity
151 to 145,
143
D7 to D0
Data 7 to Data 0
I/O
These are used for lower-byte and parity-bit signals of the
data bus.
When the CS0 input is valid, these pins serve as I/O ports for
the registers in the SPC.
When the CS1 input is valid, these pins serve as data I/O ports
for the DMA bus.
141
LDP
Lower Data Parity
138 to 134
A4 to A0
Address 4 to
Address 0
I
These are used to input addresses for selecting the
internal register.
170
RD (R/W)
Read (Read/Write)
I
In the 80-series mode, this is used for input of signals
(IORD or RD) for the read operation from the SPC to the
MPU. The signal is Active Low.
In the 68-series mode, this is used for input of control signals
(R/W) for the read and write operations from the MPU to the
SPC.
The signal is Active High at the read operation and Active Low
at the write operation.
168
WR (LDS)
Write (Lower Data
Strobe)
I
In the 80-series mode, this is used for input of signals
(IOWR or WR) for the write operation from the MPU to the
SPC.
In the 68-series mode, this is used for input of LDS signals out-
put by the MPU when the lower bytes of the data bus are valid.
The signal is Active Low in both modes.
167
BHE (UDS)
Bus High Enable
(Upper Data
Strobe)
I
In the 80-series mode, this is used for input of BHE
signals output by the MPU when the upper bytes of the
data bus are valid.
In the 68-series mode, this is used for input of UDS signals
output by the MPU when the upper bytes of the data bus are
valid.
The signal is Active Low in both modes.
相關PDF資料 |
PDF描述 |
|---|---|
| MB86604L | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| MB86604 | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| MB86604LPFV | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| MB86605 | SCSI-II Protocol Controller(with PCI interface)(SCSI-II 協(xié)議控制器(帶PCI接口)) |
| MB86606A | FAST-20 SCSI Protocol Controller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB86604 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:SCSI-II Protocol Controller (with single-ended driver/receiver) |
| MB86604L | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:SCSI-II Protocol Controller (with single-ended driver/receiver) |
| MB86604LPFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:SCSI-II Protocol Controller (with single-ended driver/receiver) |
| MB86606A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FAST-20 SCSI Protocol Controller |
| MB86606APMT2 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FAST-20 SCSI Protocol Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復。