參數(shù)資料
型號(hào)： MB86831-80PFV
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-bit Embedded Controller
中文描述： 32-BIT, 80 MHz, RISC MICROCONTROLLER, PQFP176
封裝： 24 X 24 MM, PLASTIC, QFP-176
文件頁(yè)數(shù)： 56/82頁(yè)
文件大?。?/td> 1373K
代理商： MB86831-80PFV
MB86830 Series
56
Integer operation unit internal block diagram
3.
The MB86830 series has a wide addressable range in which user and supervisor spaces can be defined indepen-
dently. Of 30 lines of addresses, eight lines of address space identifiers (ASI) are used to distinguish between
protected and unprotected spaces. Tow of 256 different ASI values are used to define the user data and user in-
struction spaces; the rest are used to define the supervisor space.
When a reset, synchronous trap, or asynchronous trap occurs, the processor enters the supervisor mode. In the
supervisor mode, the processor executes instructions in the supervisor space and transfers data. The processor
can access other ASI values even when staying in the supervisor mode. The processor can use the remaining ASI
values, excluding the reserved values, to allocate other spaces as application definable spaces.
By distinguishing between the user and supervisor spaces, hardware can prevent inadvertent or unauthorized ac-
cess to system resources. When a real-time operating system (RTOS) is developed, for example, individual spac-
es provide the mechanism for separating the RTOS space efficiently from the user space.
Address Space
4.
The register set of the MB86830 series is made up of the registers to be used for general-purpose functions and
those to be used for control and status report purpose. The MB86830 series has 136 general-purpose registers
divided into eight global registers and a stack of eight register blocks (register windows). Each register window
incorporates 24 registers, of which eight registers are local to that window, eight “out” registers are overlapping the
next register window, and eight “in” registers are overlapping the previous register window. (See “General register
composition”.)
This register configuration allows a parameter to be passed to a subroutine. The next register window is made
Registers
ir
e_ir
m_ir
w_ir
Instruction
block
(I block)
I data
adder
read1
read2
read3
write
Register file
A
B
inc (+4)
0
TBR
pc
d_pc
e_pc
m_pc
ALU / Shifter
R
PSR/WIM/Y
Data address
W
st_align
Id_align
Address block
(A block)
Execution block
(E block)
D address
D data
I address
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB86831PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
MB86832 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
MB86832-100PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
MB86832-66PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
MB86832-80PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller
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