參數(shù)資料
型號(hào)： MB86831
廠商： Fujitsu Limited
英文描述： 32-bit Embedded Controller
中文描述： 32位嵌入式控制器
文件頁(yè)數(shù)： 45/82頁(yè)
文件大?。?/td> 1373K
代理商： MB86831
MB86830 Series
45
(Continued)
(V
DD5
=
3.3 V
±
0.15 V, V
DD3
=
2.5 V
±
0.1 V, V
SS
=
0.0 V, T
A
=
0
°
C to
+
70
°
C)
P:Period (Cycle time)
* : RDYOUT# at the external ready mode is provided for from READY# input.
Notes
Each parameter is valid within the specified ranges of temperatures and supply voltages unless otherwise
noted.
Each voltage value is based on the GND (V
SS
=
0.0 V) level. The timing measurement reference point is 1.5
V, the input level is 0.4 to 2.4 V, and the input rise time and fall time are 2 ns or less.
Do not leave more than one output pins short-circuited for 1 second or more.
The external output load capacitance is 30 pF.
The specifications of pins other than those pins designated as asynchronous inputs and than the RDYOUT#
pin in external ready mode are determined by the rising edge of the external clock (CLKIN).
These specifications are subject to change for improvement.
The reset period requires at least 4 CLKIN cycles. The PLL oscillation stabilization delay time requires at least
4000 clock (CLKIN) pulses. For 40 MHz (25 ns) clock input, for example, the reset signal must therefore be
negated 100
μ
s later.
Classifica-
tion
Parameter
Symbol
Value
Unit
Min.
2
2
2
2
Max.
DRAM-
Coutput
Delay time
RAS0# to RAS3#
15
15
15
15
ns
Hold time
ns
Delay time
CAS0# to CAS3#
ns
Hold time
ns
Delay time
DWE0# to DWE3#
ns
Hold time
ns
Delay time
DOE#
ns
Hold time
ns
IRC input
Setup time
IRQ15 to IRQ8
Asynchronous
ns
Hold time
Asynchronous
2
×
P
+
10
2
×
P
+
10
ns
“H” level period
ns
“L” level period
ns
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