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參數(shù)資料
| 型號(hào)： | MB86H23 |
| 廠商： | Fujitsu Limited |
| 英文描述： | MPEG-2 Decoder with Macrovision |
| 中文描述： | 的MPEG - 2解碼器通過(guò)Macrovision |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 174K |
| 代理商： | MB86H23 |
Copyright 2003 Fujitsu Microelectronics Europe GmbH Preliminary
Page 1 of 2
Disclaimer:
The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
MB86H23
Product Profile
November 2003
Edition 0.55
FME/MM/PP/1103
MPEG-2 Decoder with Macrovision
SmartMPEG
INTRODUCTION:
This
SmartMPEG
is an integrated MPEG-2 set-
top-box decoder which includes the hardware extensions
required to support a low Bill of Material for Set-Top-
Boxes and IDTVs. This devece support Macrovision.
Highlights of the
SmartMPEG
include an ARC
RISC CPU (@130.5MHz), two transport stream
demultiplexers with integrated DVB descramblers, a PAL/
NTSC/SECAM digital video encoder and a display
controller, which overlays up to four layers of graphic data.
A specially designed, shared SDRAM memory interface
for the CPU and MPEG decoder connects to a single
SDRAM device using either a 16 or 32-bit data bus
depending on customer bandwidth requirements. The
included universal processor interface allows simple
connection to FLASH, hard disk drives (IDE), Common
Interface and other asynchronous devices.
The
SmartMPEG
is part of Fujitsu’s MPEG
decoder family, and is the successor to the MB87L2250.
The
SmartMPEG
offers several advantages over
the MB87L2250, including support for 16/32-bit SDRAM
devices up to 128Mbytes, an integrated S/P-DIF interface,
DPLL, and internal audio DAC’s. This helps to reduce
product cost by eliminating the need for external
components. The
SmartMPEG
adds also DPLL
functionality, SECAM encoding, and two Smart-card
interface to former MPEG devices.
To help our customers achieve the shortest possible time-
to-market, the
SmartMPEG
comes with the
Fujitsu
Driver Application Programming Interface (FAPI)
.
FAPI is a complete driver set, allowing fast and efficient
customer software design. In addition, FAPI is now the
standard programming interface for Fujitsu DVB
components, easing migration to future devices.
FEATURES
MPEG2 video ISO/IEC 13818-2 (MP@ML...SP@ML)
MPEG audio layer 1/2
32-bit RISC CPU (ARC Tangent A4 @130.5MHz)
4K I-cache, 2K D-cache
Three timers / watchdog / power-down mode
Shared memory interface (SDRAM, 16/32 bit data),
64Mbit...1Gbit
Universal processor interface (IDE, NAND/NOR
FLASH & Common Interface)
Two transport stream decoders (decoding/recording)
including two DVB descrambler
Flexible MPEG video resizing (factor 1/16 to 2)
Display controller with up to 4 true colour graphic or
CLUT layers (total 6 layers)
Flexible frame rate conversion (e.g. 50/60Hz)
Flicker fixer for better on-screen text clarity
Teletext / WSS / VPS / CC / VBID insertion
PAL/NTSC/SECAM digital encod., Macrovision 7.1.L1
RGB De-matrix (RGB or YCrCb output)
Control of brightness, contrast and colour saturation of
RGB and YCrCb output
5 video DAC’s @10bit for analogue video / audio O/P
ITU-R 656 video input/output (shared with TS2 input)
S/P DIF output for PCM/AC3/MPEG
UART / 2 x Smart Card IF / I2C / GPIO / PWM Output
7-segment LED controller for 5 digits / KeyBoard mon.
Infra Red receiver / transmitter
On-chip DPLL, requiring only 27.0MHz crystal
Bootable from NOR Flash or I2CPROM
FPT-208P-M06 (LQFP-Package)
Ambient Temperature Range: 0
o
C to +70
o
C
Advanced Technology: Fujitsu CMOS Cx81 (0.18μm)
1.8 volt device with 3.3 volt I/O Power consumption:
typ. 700mW (Standby: 100mW)
SmartMPEG Internal Bus @ 130.5MHz
ARC@130.5MHz
Tangent-A4
4K
I-Cache
Watch-
Dog
Power-
Down
IRQ
CTRL
3
Timers
TS Demultiplexers
Buffer Mgr
DVB Descramblers
DPLL
Shared
Memory
Interface
MPEG-2 Video Decoder
MPEG Audio Decoder
S/P-DIF Output Unit
Resizing
TXT Insertion
Display
Controller
(2 x 2 Layer)
Digital
Encoder
(PAL/NTSC/
SECAM)
Adjustable
RGB De-Matrix
WSS / VPS
Insertion
CC/VBID
Insertion
ITU-R656
Output
DAC1
DAC2
DAC3
DAC4
DAC5
Universal
Processor
Interface
Chip Select
CTRL
HDD/IDE
CTRL
I2C
UART
2 Smart
Card
PWM
IR Rx
IR Tx
GPIO
GPI
GPO
7-Seg
CTRL
TS1
Par/Ser
TS2
Par/Ser
NOR / NAND Flash
HDD / IDE / CI
SDRAM
(64Mbit … 1Gbit)
16/32 bit
Shared Memory
S/P-DIF
(Dolby Dig. Bitstream)
I2S (Audio)
Analog O/P:
CVBS, YC, RGB
YC
R
C
B,
Audio R/L
ITU-R656
IRQ / I2C / 2 Smart Card
UART / IR In / IR Out
GPIO / 7-Segment Ctrl
PWM / KeyBoard Mon
27.0MHz
TS3
intern
ITU-R656
Boot
ROM
2K
D-Cache
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