參數(shù)資料
型號(hào): MB89165-PF
廠商: FUJITSU LTD
元件分類(lèi): 微控制器/微處理器
英文描述: Quadruple 2-Input Positive-NOR Gates 14-CDIP -55 to 125
中文描述: 8-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP-80
文件頁(yè)數(shù): 53/59頁(yè)
文件大小: 875K
代理商: MB89165-PF
53
MB89160/160A Series
I
MASK OPTIONS
Part number
MB89161/3/5
MB89P165
MB89PV160
Specifying procedure
Specify when
ordering masking
Set with EPROM
programmer
Setting not possible
Pull-up resistors (SEG)
P00 to P07, P10 to P17,
P20 to P27, P40 to P47,
P50 to P57, P60 to P67
Slectable per pin
(The pull-up resistors for
P40 to P47 and P60 to
P67 are only selectable
when these pins are not
set as segment outputs.
When the A/D is used,
P50 to P57 are must not
selected.)
Can be set per pin
(P20 to P27, P40 to
P47, and P60 to P67
are available only for
without a pull-up
resistor.)
Fixed to without
pull-up resistor
Power-on reset (POR)
With power-on reset
Without power-on reset
Selectable
Selectable
Fixed to with power-on
reset
Selection of oscillation stabilization
time (OSC)
The initial value of the oscillation
stabilization time for the main clock
can be set by selecting the values of
the WTM1 and WTM0 bits on the
right.
Selectable
OSC
0
1
2
3
: 2
2
/F
CH
: 2
12
/F
CH
: 2
16
/F
CH
: 2
18
/F
CH
Selectable
WTM1 WTM0
0
0
1
1
0
1
0
1
: 2
2
/F
CH
: 2
12
/F
CH
: 2
16
/F
CH
: 2
18
/F
CH
Fixed to oscillation
stabilization time of
2
16
/F
CH
Main clock oscillation type (XSL)
Crystal or ceramic resonator
CR
Selectable
Crystal or ceramic onlyceramic
Reset pin output (RST)
With reset output
Without reset output
Selectable
Selectable
Fixed to with reset
output
Clock mode selection (CLK)
Dual-clock mode
Single-clock mode
Selectable
Selectable
Fixed to dual-clock
mode
相關(guān)PDF資料
PDF描述
MB89165-PFS Quadruple 2-Input Positive-NOR Gates 14-CDIP -55 to 125
MB89165-PFV Quadruple 2-Input Positive-NOR Gates 20-LCCC -55 to 125
MB89165A-PF Quadruple 2-Input Positive-NOR Gates 14-CDIP -55 to 125
MB89165A-PFS Quadruple 2-Input Positive-NOR Gates 14-CFP -55 to 125
MB89165A-PFV Replaced by SN54LS03 : Quadruple 2-Input Positive-NAND Buffers With Open-Collect 14-CDIP -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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