參數資料
型號: MB89202-PSH
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12.5 MHz, MICROCONTROLLER, PDIP32
封裝: PLASTIC, SHDIP-32
文件頁數: 17/39頁
文件大?。?/td> 557K
代理商: MB89202-PSH
MB89201 Series
24
3. DC Characteristics
(VCC
= 5.0 V ± 10%, VSS = 0.0 V, FCH = 12.5 MHz (External clock) , Ta = 40 °C to +85 °C)
Parameter
Sym-
bol
Pin name
Condition
Value
Unit
Remarks
Min.
Typ.
Max.
“H” level input
voltage
VIH
P00 to P07,
P31, P37, P40 to P43,
P50, P60 to P62, P70 to P72
0.7 VCC
VCC + 0.3
V
VIHS
P30, P32 to P36, RST
UCK/SCK, UI/SI, EC,
INT20 to INT27,
INT10 to INT12
0.8 VCC
VCC + 0.3
V
“L” level input
voltage
VIL
P00 to P07,
P31, P37, P40 to P43,
P50, P60 to P62,
P70 to P72
VSS
0.3
0.3 VCC
V
VILS
P30, P32 to P36, RST,
UCK/SCK, UI/SI, EC,
INT20 to INT27,
INT10 to INT12
VSS
0.3
0.2 VCC
V
Open-drain
output pin
application
voltage
VD
P40 to P43, RST/P62
VSS
0.3 VCC + 0.3
V
“H” level
output voltage
VOH
P00 to P07, P30 to P37, P40
to P43, P50, P70 to P72
IOH
= 4.0 mA
4.0
V
“L” level
output voltage
VOL1
P00 to P07, P30 to P37, P50,
RST/P62
IOL
= 4.0 mA
0.4
V
VOL2 P40 to P43, P70 to P72
IOL
= 12.0 mA
0.4
V
Input leakage
current
ILI
P00 to P07, P30 to P37, P40
to P43, P50 , P60 to P61,
RST/P62, P70 to P72
0.45 V
< VI < VCC
±5
A
Without
pull-up resis-
tor
Pull-up
resistance
RPULL
P00 to P07, P30 to P37,
P50, RST/P62, P70 to P72
VI
= 0.0 V
25
50
100
k
MB89201/202/
N201/N202
P00 to P07, P30 to P37,
P50, P70 to P72
MB89F201/F202
Power supply
current
ICC
VCC
Normal operation
mode
(External clock,
highest gear speed)
When A/D
converter stops
812
mA MB89201/202
69
mA MB89N201/N202/
F201/F202
When A/D
converter starts
10
15
mA MB89201/202
812
mA MB89N201/N202/
F201/F202
ICCS
Sleep mode
(External clock,
highest gear speed)
When A/D
converter stops
46
mA MB89201/202
35
mA MB89N201/N202/
F201/F202
ICCH
Stop mode
Ta
= +25 °C
(External clock)
When A/D
converter stops
1
A MB89201/202
10
A MB89N201/N202/
F201/F202
Input
capacitance
CIN
Other than C, VCC, VSS
10
pF
相關PDF資料
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