![](http://datasheet.mmic.net.cn/330000/MB89490_datasheet_16436892/MB89490_3.png)
3
MB89490 Series
*1 : I
2
C is complied to Philips I
2
C specification.
MB89497
MB89498
MB89F499
MB89PV490
CPU functions
Number of instructions
Instruction bit length
Instruction length
Data bit length
Minimum execution time
Minimum interrupt processing time
I/O ports (CMOS)
Input ports (CMOS)
N-channel open drain I/O ports
Total
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8, 16 bits
: 0.32
μ
s/12.5 MHz
: 2.88
μ
s/12.5 MHz
: 56 pins
: 2 pins
: 8 pins
: 66 pins
Ports
21-bit timebase
timer
Watchdog timer
Interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 MHz
Reset period (167.8 ms to 335.5 ms) at 12.5 MHz.
8-bit reload timer operation (supports square wave output, operating clock period: 1, 8, 16, 64
t
inst
,)
8-bit resolution PWM operation
Can be operated either as a 2-channel 8-bit timer/counter (timer 00 and timer 01, each with its
own independent operating clock cycle), or as one 16-bit timer/counter
In timer 00 or 16-bit timer/counter operation, event counter operation (external clock-triggered)
and square wave output capability
Can be operated either as a 2-channel 8-bit timer/counter (timer 10 and timer 11, each with its
own independent operating clock cycle), or as one 16-bit timer/counter
In timer 10 or 16-bit timer/counter operation, event counter operation (external clock-triggered)
and square wave output capability
PWM timer 0,1
8/16-bit timer/
counter 00, 01
8/16-bit timer/
counter 10, 11
External interrupt 0
(edge)
External interrupt 1
(level)
8 independent channels (selectable edge, interrupt vector, request flag)
8 channels (low level interrupt)
A/D converter
10-bit resolution
×
8 channels
A/D conversion function (conversion time: 38 t
inst
)
Supports repeated activation by internal clock
LCD controller/driver
Common output
Segment output
Bias power supply pins
LCD display RAM size
Synchronous/asynchronous data transfer capability
(Max. baud rate: 97.656 Kbps at 12.5 MHz)
(7 and 8 bits with parity bit; 8 and 9 bits without parity bit)
8-bit serial I/O with LSB first/MSB first selectability
One clock selectable from four operation clock (one external shift clock, three internal shift
clock: 0.64
μ
s, 2.56
μ
s, 10.24
μ
s at 12.5MHz)
1 channel
Use a 2-wire protocol to communicate with other device
Selectable maximum noise width removal
Reversible input polarity
: 4 (max.)
: 32 (max.)
: 3
: 32
×
4 bits
UART/SIO
SIO
I
2
C
*1
Remote receiver
Standby mode
Sleep mode, stop mode, watch mode, sub-clock mode
Process
CMOS
Operating voltage
2.2V ~ 3.6V
2.7V ~ 3.6V
2.7V ~ 3.6V
Part number
Parameter