參數(shù)資料
型號(hào): MB89626R
廠商: Fujitsu Limited
英文描述: Octal Transparent D-type Latches With 3-State Outputs 20-LCCC -55 to 125
中文描述: 8位微控制器專有
文件頁數(shù): 40/61頁
文件大?。?/td> 915K
代理商: MB89626R
40
MB89620R Series
(9) Serial I/O Timing
(V
CC
= +5.0 V
±
10%, AV
SS
= V
SS
= 0.0 V, T
A
= –40
°
C to +85
°
C)
Value
*: For information on t
inst
, see “(4) Instruction Cycle.”
Parameter
Symbol
Pin name
Condition
Unit
Remarks
Min.
Max.
Serial clock cycle time
t
SCYC
SCK1,
SCK2
Internal shift
clock mode
2 t
inst
*
μ
s
SCK1
↓ →
SO1 time
SCK2
↓ →
SO2 time
t
SLOV
SCK1,
SO1
SCK2,
SO2
–200
200
ns
Valid SI1
SCK1
Valid SI2
SCK2
t
IVSH
SI1, SCK1
SI2, SCK2
1/2 t
inst
*
μ
s
SCK1
↑ →
valid SI1 hold time
SCK2
↑ →
valid SI2 hold time
t
SHIX
SCK1, SI1
SCK2, SI2
1/2 t
inst
*
μ
s
Serial clock “H” pulse width
t
SHSL
SCK1,
SCK2
External shift
clock mode
1 t
inst
*
μ
s
Serial clock “L” pulse width
t
SLSH
SCK1,
SCK2
1 t
inst
*
μ
s
SCK1
↓ →
SO1 time
SCK2
↓ →
SO2 time
t
SLOV
SCK1,
SO1
SCK2,
SO2
0
200
ns
Valid SI1
SCK1
Valid SI2
SCK2
t
IVSH
SI1, SCK1
SI2, SCK2
1/2 t
inst
*
μ
s
SCK1
↑ →
valid SI1 hold time
SCK2
↑ →
valid SI2 hold time
t
SHIX
SCK1, SI1
SCK2, SI2
1/2 t
inst
*
μ
s
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