參數(shù)資料
型號(hào)： MB89663
廠商： Fujitsu Limited
英文描述： Quadruple Bus Buffer Gates With 3- State Outputs 20-LCCC -55 to 125
中文描述： 8位微控制器專有
文件頁(yè)數(shù)： 3/48頁(yè)
文件大?。?/td> 652K
代理商： MB89663
MB89660 Series
3
I
PRODUCT LINEUP
(Continued)
MB89665
MB89W665
MB89P665
Classification
Mass production products
(mask ROM products)
EPROM product
One-time PROM product,
also used for evaluation
ROM size
8 K
×
8 bits
(internal mask ROM)
16 K
×
8 bits
(internal mask ROM)
16 K
×
8 bits
(internal PROM,
programming with
general-purpose
EPROM programmer)
16 K
×
8 bits
(internal PROM,
programming with
general-purpose
EPROM programmer)
RAM size
256
×
8 bits
512
×
8 bits
CPU functions
Number of instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
136
8 bits
1 to 3 bytes
1,8, 16 bits
0.4
μ
s/10 MHz
3.6
μ
s/10 MHz
Ports
Output ports (CMOS):
Output ports (N-ch open-drain):
I/O ports (CMOS):
Total:
8
8 (All also serve as peripherals.)
36 (19 ports also serve as peripherals.)
52
8-bit PWM timer
8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4
μ
s, 6.4
μ
s, 25.6
μ
s)
8-bit resolution PWM operation (conversion cycle: 102
μ
s, 1.6 ms, 6.6 ms)
8/16-bit timer/
counter
Independent 8-bit reload timer/counter operation: 2 channels
Single 16-bit event counter (cascade connection): 1 channel
One clock selectable from four transfer clocks
(one external shift clock, three internal clocks: 0.8
μ
s, 3.2
μ
s, 12.8
μ
s)
UART
8 bits
Full-duplex double buffer
Synchronous and asynchronous data transfer
8-bit serial I/O
8 bits
LSB first/MSB first selectability
One clock selectable from four transfer clocks
(one external shift clock, three internal shift clocks: 0.8
μ
s, 3.2
μ
s, 12.8
μ
s)
8-bit A/D
converter
8-bit resolution
×
8 channels
A/D conversion mode (conversion time: 18
μ
s at 10 MHz)
Sense mode (conversion time: 5
μ
s at 10 MHz)
Continuous activation by an external activation or an internal timer capable
Reference voltage input
Real-time I/O
16-bit timer: operating clock cycle (0.4
μ
s, 0.8
μ
s, 1.6
μ
s, 3.2
μ
s)
overflow interrupt
Input capture: 16 bits
×
2 channels (External trigger edge selectability)
Output compare: 16 bits
×
2 channels
MB89663
Parameter
Part number
相關(guān)PDF資料
PDF描述
MB89663P-SH Quadruple Bus Buffer Gates With 3- State Outputs 14-CDIP -55 to 125
MB89663PF Quadruple Bus Buffer Gates With 3- State Outputs 14-CFP -55 to 125
MB89665 Quadruple Bus Buffer Gates With 3-State Outputs 14-CDIP -55 to 125
MB89665P-SH Quadruple Bus Buffer Gates With 3-State Outputs 14-CFP -55 to 125
MB89665PF Quadruple Bus Buffer Gates With 3-State Outputs 20-LCCC -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB89663PF 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller
MB89663P-SH 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller
MB89663R 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller
MB89663RPF 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller
MB89663RP-SH 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller
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