參數(shù)資料
型號(hào): MB89935APFV
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 20-LCCC -55 to 125
中文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDSO30
封裝: PLASTIC, SSOP-30
文件頁數(shù): 16/46頁
文件大?。?/td> 633K
代理商: MB89935APFV
MB89930A Series
16
2.
Registers
The MB89930A series has two types of registers; dedicated registers in the CPU and general-purpose registers
in the memory. The following dedicated registers are provided :
Program counter (PC) :
A 16-bit register for indicating instruction storage positions
Accumulator (A) :
A 16-bit temporary register for storing arithmetic operations, etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T) : A 16-bit register which performs arithmetic operations with the accumulator
When the instruction is an 8-bit data processing instruction, the lower byte is
used.
Index register (IX) :
A 16-bit register for index modification
Extra pointer (EP) :
A 16-bit pointer for indicating a memory address
Stack pointer (SP) :
A 16-bit register for indicating a stack area
Program status (PS) :
A 16-bit register for storing a register pointer, a condition code
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR) . (See the diagram below.)
PS
PC
16 bit
A
T
IX
EP
SP
RP
CCR
: Program counter
: Accumulator
: Temporary accumulator
: Index register
: Extra pointer
: Stack pointer
: Program status
FFFD
H
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
I-flag = 0, IL1, 0 = 11
The other bit values are indeterminate.
Initial value
PS
RP
CCR
X011XXXX
B
CCR initial value
bit15 bit14 bit13 bit12 bit11 bit10
R4
R3
R2
bit9
bit8
bit7
H
bit6
I
bit5
IL1
bit4
IL0
bit3
N
bit2
Z
bit1
V
bit0
C
R1
R0
H-flag
N-flag
IL1,0
I-flag
Z-flag
C-flag
V-flag
×
: Undefined
Structure of the Program Status Register
相關(guān)PDF資料
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