參數(shù)資料
型號(hào)： MB89951PFM
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64
封裝： 0.65 MM PITCH, QFP-64
文件頁(yè)數(shù)： 65/110頁(yè)
文件大?。?/td> 619K
代理商： MB89951PFM
HARDWARE CONFIGURATION
2– 43
[Bit 5] TDRE:
The TDRE flag is used to indicate the status of the serial output data register
(SODR).
If SODR (Serial Output Data Register) is empty, and newly written data to
SODR, SODR will be driven out of the serial output pin (P44/SO).
When the TDRE flag is set to 1, a transmitter interrupt request is output.
[Bit 4] TIE: Transmitter interrupt request enable bit
Bit 4 is used to enable the transmitter interrupt request.
[Bit 3] RIE: Receiver interrupt request enable bit
Bit 3 is used to enable the receiver interrupt request.
[Bit 1] TD8/TP:
When parity is not provided, bit 1 is treated as bit 8 of the SODR register.
When parity is provided, this bit is used to determine whether the parity of
serial output data is even or odd.
[Bit 0] RD8/RP:
When parity is not provided, bit 0 is treated as bit 8 of the SIDR register.
When parity is provided, this bit is used to determine whether the parity of
serial input data is even or odd (Initial value: undefined).
Peripherals
0
1
Contains data
Empty
(Initial value)
0
1
Disables interrupt
(Initial value)
Enables interrupt
0
1
Disables interrupt
(Initial value)
Enables interrupt
0
1
Odd parity
Even parity
(Initial value)
0
1
Odd parity
Even parity
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