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| 型號(hào)： | MB89965PFV1-G-XXX |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48 |
| 文件頁(yè)數(shù)： | 111/278頁(yè) |
| 文件大小： | 1847K |
| 代理商： | MB89965PFV1-G-XXX |
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MB89960 series
CHAPTER 10 8-Bit Serial I/O
177
10
Table 10.3.1 Serial Mode Register (SMR) Bits
NO.
Bit
Function
bit7
SIOF:
Interrupt request flag bit
This bit is set to “1” when the serial output operation has output 8 bits of serial
data or the serial input operation has input 8 bits of serial data. An interrupt
request is output when both this bit and the interrupt request enable bit (SIOE)
are “1”.
Writing “0” clears the bit. Writing “1” has no effect and does not change the bit
value.
bit6
SIOE:
Interrupt request enable
bit
Enables or disables output of interrupt requests to the CPU. An interrupt request is
output when both this bit and the interrupt request flag bit (SIOF) are “1”.
bit5
SCKE:
Shift clock output
enable bit
Controls input and output of the shift clock.
The P30/SCK pin operates as the shift clock input pin when this bit is “0” and as
the shift clock output pin when the bit is “1”.
Cautions: Set the P30/SCK pin as an input port in the port direction register
(DDR3: bit 0= “0”) when the SCK pin is set to operate as the shift
clock input pin (SCKE = “0”). Also, select external shift clock
operation using the shift clock selection bits (CKS1, CKS0 = 11B)
When set as the shift clock output pin (SCKE = “1”), select internal
shift clock operation (CKS1, CKS0 = other than 11B).
Notes: When the SCK pin is set to operate as the shift clock output (SCKE =
“1”), the pin operates as an output even if the port direction register
corresponding to the general-purpose port (P30) is set to input (DDR3:
bit 0= “0”).
Set to shift clock input operation (SCKE = “0”) when using the pin as a
general-purpose port (P30).
bit4
SOE:
Serial data output
enable bit
The P31/SO pin operates as a general-purpose port (P31) when this bit is set to
“0” and as the serial data output pin (SO) when set to “1”.
Note: If serial data output is selected (SOE = “1”), the SO pin operates as an
output even if the port direction register corresponding to the general-
purpose port (P31) is set to input (DDR3: bit 1= “0”).
bit3
bit2
CKS1, CKS0:
Shift clock selection bits
Selects the shift clock from one external and three internal shift clocks.
Setting the bits to other than “11B” selects an internal shift clock. In this case,
the shift clock is output from the SCK pin if the shift clock output enable bit
(SCKE) is “1”.
Setting the bits to “11B” selects the external shift clock. This inputs the shift
clock from the SCK pin if shift clock input is enabled (SCKE = “0” and DDR3: bit
0= “0”).
bit1
BDS:
Transfer direction
selection bit
This bit selects whether serial data is transferred with the least significant bit first
(LSB-first, BDS = “0”) or the most significant bit first (MSB-first, BDS = “1”).
Caution: As bits are set in the appropriate order when writing to or reading from
serial data register (SDR), modifying this bit does not apply to any data
already set in the SDR register.
bit0
SST:
Serial I/O transfer start
bit
Controls serial I/O transfer start and transfer enable. This bit can also be used
to determine whether transfer has completed.
Writing “1” to this bit when an internal shift clock is selected (CKS1, CKS0 =
other than “11B”) clears the shift clock counter and starts data transfer.
Writing “1” to this bit when the external shift clock is selected (CKS1, CKS0 =
“11B”) enables data transfer, clears the shift clock counter, and sets serial I/O to
wait for input of the external shift clock.
This bit is cleared to “0” and the SIOF bit set to “1” when transfer completes.
Writing “0” to this bit while transfer is in progress (SST = “1”) aborts the transfer.
After aborting a transfer, data must be set again to the SDR register for data
output and transfer restarted (the shift clock counter cleared) for data input.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB89P965PFM | 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP48 |
| MB89965PF-G-XXX | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP48 |
| MB89965PFM-G-XXX | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP48 |
| MB89965PFV-G-XXX | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP64 |
| MB89P965PFV | 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB8996X | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89983 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89983-XXX-PFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89983-XXX-PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB8998X | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
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