參數(shù)資料
型號(hào)： MB89P585BW
廠商： Fujitsu Limited
英文描述： 8-bit Proprietary Microcontrollers
中文描述： 8位微控制器專(zhuān)有
文件頁(yè)數(shù)： 16/42頁(yè)
文件大小： 600K
代理商： MB89P585BW
MB89580B/580BW series
16
The PS register can further be divided into the register bank pointer in the higher 8 bits (RP) and the condition code
register in the lower 8 bits (CCR) . (See the diagram below.)
The RP points to the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule shown next.
The CCR consists of the bits indicating arithmetic operation results or transfer data contents and the bits that
control CPU operations at the time of an interrupt.
H flag
: The flag is set to “1” when an arithmetic operation results in a carry from bit 3 to bit 4 or in a borrow
from bit 4 to bit 3. The bit is cleared to “0” in other instances. The flag is for decimal adjustment
instructions; do not use for other than additions and subtractions.
: Interrupt is enabled when this flag is set to “1.” Interrupt is disabled when this flag is set to “0.” The
flag is set to “0” when reset.
: Indicates the level of the interrupt currently enabled. An interrupt is processed only if its level is
higher than the value this bit indicates.
I flag
IL1, 0
IL1
IL0
Interrupt level
High-low
0
0
1
Higher
Lower
=
no interruption
0
1
1
0
2
1
1
3
PS
RP
CCR
X011XXXX
B
bit15 bit14 bit13 bit12 bit11 bit10
R4
R3
R2
bit9
bit8
bit7
H
bit6
I
bit5
IL1
bit4
IL0
bit3
N
bit2
Z
bit1
V
bit0
C
R1
R0
I-Flag
H-Flag
IL 1,0
Z-Flag
V-Flag
C-Flag
N-Flag
CCR initial value
X : Undefined
Rule for Conversion of Actual Addresses in the General-purpose Register Area
"0"
"0"
"0"
"0"
"0"
"0"
"0"
"1"
R4
R3
R2
R1
R0
b2
b1
b0
A7
A6
A5
A4
A3
A2
A1
A0
A15 A14 A13 A12 A11 A10
A9
A8
Generated addresses
RP higher bits
OP code in lower bits
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