- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377910 > MB89P665PF (FUJITSU LTD) 0.22A, 2.7-5.5V Single Power Distribution Switch IC Hi-Side MOSFET, Fault Report, Act-Low Enable 8-PDIP PDF資料下載
參數(shù)資料
| 型號： | MB89P665PF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 0.22A, 2.7-5.5V Single Power Distribution Switch IC Hi-Side MOSFET, Fault Report, Act-Low Enable 8-PDIP |
| 中文描述： | 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 19/48頁 |
| 文件大?。?/td> | 652K |
| 代理商： | MB89P665PF |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
MB89660 Series
19
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for control of CPU operations at the time of an interrupt.
H-flag:
Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared
otherwise. This flag is for decimal adjustment instructions.
I-flag:
Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0
when reset.
IL1, 0:
Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is
higher than the value indicated by this bit.
N-flag:
Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0.
Z-flag:
Set when an arithmetic operation results in 0. Cleared otherwise.
V-flag:
Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does
not occur.
C-flag:
Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared otherwise.
Set to the shift-out value in the case of a shift instruction.
IL1
IL0
Interrupt level
High-low
0
0
1
High
Low = no interrupt
0
1
1
0
2
1
1
3
Rule for Conversion of Actual Addresses of the General-purpose Register Area
“0”
↓
A15
“0”
↓
A14
“0”
↓
A13
“0”
↓
A12
“0”
↓
A11
“0”
↓
A10
“0”
↓
A9
“1”
↓
A8
R4
↓
A7
R3
↓
A6
R2
↓
A5
R1
↓
A4
R0
↓
A3
b2
↓
A2
b1
↓
A1
b0
↓
A0
Lower OP codes
RP
Generated addresses
相關PDF資料 |
PDF描述 |
|---|---|
| MB89W665 | 8-bit Proprietary Microcontroller |
| MB89W665C-SH | 8-bit Proprietary Microcontroller |
| MB89670R | 8-bit Proprietary Microcontroller |
| MB89675AR | Hex Schmitt-trigger Inverters 14-CFP -55 to 125 |
| MB89675ARPFM | Hex Schmitt-trigger Inverters 20-LCCC -55 to 125 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB89P665P-SH | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89P670ACF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89P677A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89P677APF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89P677APFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復。