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參數(shù)資料
| 型號(hào)： | MB89PV910C-102-ES-SH |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-bit Proprietary Microcontroller |
| 中文描述： | 8-BIT, 8 MHz, MICROCONTROLLER, CDIP64 |
| 封裝： | CERAMIC, MDIP-64 |
| 文件頁(yè)數(shù)： | 37/53頁(yè) |
| 文件大?。?/td> | 673K |
| 代理商： | MB89PV910C-102-ES-SH |
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37
MB89910 Series
(7) Peripheral Input Timing
(AVR = V
CC
= +5.0 V
±
10%, AV
SS
= V
SS
= 0.0 V, T
A
= –40
°
C to +85
°
C)
Value
Min.
EC, ADST
INT0, INT1
—
EC, ADST
INT0, INT1
* :For information on t
inst,
see “(4) Instruction Cycle.”
(8) Peripheral input noise limit width
(AVR = V
CC
= +5.0 V
±
10%, AV
SS
= V
SS
= 0.0 V, T
A
= –40
°
C to +85
°
C)
Value
Min.
Typ.
Note: The minimum rating is always cancelled, while values equal to or greater than maximum ratings are not
cancelled.
Parameter
Symbol
Pin name
Condition
Unit
Remarks
Max.
Peripheral input “H” level pulse
width
Peripheral input “L” level pulse
width
t
ILIH
2 t
inst
*
—
μ
s
t
IHIL
2 t
inst
*
—
μ
s
Parameter
Symbol
Pin name
Unit
Remarks
Max.
Peripheral input “H” level
noise limit width 1
t
IHNC1
All inputs excluding
INT1 and INT0
7
15
30
ns
MB89PV910
MB89P915
MB89913/
915
MB89PV910
MB89P915
MB89913/
915
MB89PV910
MB89P915
MB89913/
915
MB89PV910
MB89P915
MB89913/
915
15
30
60
ns
Peripheral input “L” level
noise limit width 1
t
ILNC1
All inputs excluding
INT1 and INT0
7
15
30
ns
15
30
60
ns
Peripheral input “H” level
noise limit width 2
t
IHNC2
INT1, INT0
30
50
100
ns
50
100
250
ns
Peripheral input “L” level
noise limit width 2
t
ILNC2
INT1, INT0
30
50
100
ns
50
100
250
ns
0.2 V
CC
0.8 V
CC
t
IHIL
0.8 V
CC
INT0, INT1
EC
ADST
0.2 V
CC
t
ILIH
0.2 V
CC
0.8 V
CC
0.8 V
CC
0.2 V
CC
t
IHNC2
t
IHNC1
t
ILNC2
t
ILNC1
P00 to P07,
P30 to P37,
P40 to P42,
P60, P61,
SCK, SI, EC
INT0, INT1
ADST
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