參數(shù)資料
型號(hào)： MB90214
廠商： Fujitsu Limited
英文描述： 8-Bit Proprietary Microcontroller(8位專用微控制器)
中文描述： 8位微控制器專利（8位專用微控制器）
文件頁(yè)數(shù)： 89/99頁(yè)
文件大?。?/td> 932K
代理商： MB90214
89
MB90210 Series
Table 15 Logical 2 Instructions (Long Word) [6 Instructions]
For an explanation of “(a)” and “(d)”, refer to Table 4, “Number of Execution Cycles for Each Form of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Table 16 Sign Inversion Instructions (Byte/Word) [6 Instructions]
For an explanation of “(a)”, “(b)” and “(c)” and refer to Table 4, “Number of Execution Cycles for Each Form of
Addressing,” and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Table 17 Absolute Value Instructions (Byte/Word/Long Word) [3 Insturctions]
Table 18 Normalize Instructions (Long Word) [1 Instruction]
* :5 when the contents of the accumulator are all zeroes, 5 + (R0) in all other cases.
Mnemonic
#
cycles
B
Operation
LH AH I
S
T
N
Z
V
C RMW
ANDL
ANDL
A, ear
A, eam
ORL
ORL
A, ear
A, eam
XORL
XORL
A, ear
A, eam
2
2+
2
2+
2
2+
5
6+ (a)
5
6+ (a)
5
6+ (a)
0
(d)
0
(d)
0
(d)
long (A)
←
(A) and (ear)
long (A)
←
(A) and (eam)
long (A)
←
(A) or (ear)
long (A)
←
(A) or (eam)
long (A)
←
(A) xor (ear)
long (A)
←
(A) xor (eam)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
R
R
R
R
R
R
–
–
–
–
–
–
–
–
–
–
–
–
Mnemonic
#
cycles
B
Operation
LH AH I
S
T
N
Z
V
C RMW
NEG
A
NEG
NEG
ear
eam
1
2
2+
2
2
3+ (a)
0
0
2
×
(b)
0
byte (A)
←
0 – (A)
byte (ear)
←
0 – (ear)
byte (eam)
←
0 – (eam)
word (A)
←
0 – (A)
X
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
–
*
*
NEGW A
NEGW ear
NEGW eam
1
2
2+
2
2
3+ (a)
0
2
×
(c)
word (ear)
←
0 – (ear)
word (eam)
←
0 – (eam)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
–
*
*
Mnemonic
#
cycles
B
Operation
LH AH I
S
T
N
Z
V
C RMW
ABS
ABSW A
ABSL
A
A
2
2
2
2
2
4
0
0
0
byte (A)
←
absolute value (A)
word (A)
←
absolute value (A)
long (A)
←
absolute value (A)
Z
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
–
–
–
–
–
–
Mnemonic
#
cycles
B
Operation
LH AH I
S
T
N
Z
V
C RMW
NRML A, R0
2
*
0
long (A)
←
Shifts to the position at
which “1” was set first
byte (R0)
←
current shift count
–
–
–
–
*
–
–
–
–
–
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