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參數(shù)資料
| 型號： | MB90467PMC |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LFQFP-64 |
| 文件頁數(shù)： | 55/88頁 |
| 文件大?。?/td> | 2202K |
| 代理商： | MB90467PMC |
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MB90460/465 Series
DS07-13714-2E
59
14. ROM Correction Function
In the case that the address of the instruction after the one that a program is currently processing matches the
address configured in the detection address configuration register, the program forces the next instruction to be
processed into an INT9 instruction, and branches to the interrupt process program. Since processing can be
conducted using INT9 interrupts, programs can be repaired using batch processing.
Overview of the Rom correction Function
The address of the instruction after the one that a program is currently processing is always stored in an
address latch via the internal data bus. Address match detection constantly compares the address stored in
the address latch with the one configured in the detection address configuration register. If the two compared
addresses match, the CPU forcibly changes this instruction into an INT9 instruction, and executes an interrupt
processing program.
There are two detection address configuration registers : PADR0 and PADR1. Each register provides an
interrupt enable bit. This allows you to individually configure each register to enable/prohibit the generation of
interrupts when the address stored in the address latch matches the one configured in the detection address
configuration register.
Block Diagram
Address latch
Stores value of address output to internal data bus.
Address detection control register (PACSR)
Set this register to enable/prohibit interrupt output when an address match is detected.
Detection address configuration register (PADR0, PADR1)
Configure an address with which to compare the address latch value.
PACSR
PADR0 (24 bit)
PADR1 (24 bit)
Address latch
Detection address configuration register 0
Detection address configuration register 1
Comparator
INT9 instruction
(INT9 interrupt generation)
Re-
served
Re-
served
Re-
served
AD0E
Re-
served
AD1E
Re-
served
Re-
served
Internal
data
bus
Address detection control register (PACSR)
Reserved : Make sure this is always set to “01”
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB90467P-SH | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90470 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-Bit Proprietary Microcontroller |
| MB90470B | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-Bit Proprietary Microcontroller |
| MB90473 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-Bit Proprietary Microcontroller |
| MB90473PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-Bit Proprietary Microcontroller |
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