參數(shù)資料
型號: MB90473PFV
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 30/118頁
文件大?。?/td> 1199K
代理商: MB90473PFV
MB90470 Series
19
s BLOCK DIAGRAM
P00 to P07 (8 pins) : Input pull-up resistance setting register provided.
P10 to P17 (8 pins) : Input pull-up resistance setting register provided.
P40 to P47 (8 pins) : Open drain setting register provided.
P70 to P75 (6 pins) : Open drain setting register provided.
P76, P77 (2 pins)
: Open drain
Note : In the above diagram, I/O ports are shown sharing pin numbers with the built-in function blocks. However
pins may not be used as I/O ports when they are in use as pins for build-in function modules.
RAM
Clock
control circuit
88
8
P00
P07
P10
P17
P20
P27
P30
P37
P40
P47
P50
P57
P60
P67
P70
P77
P80
P87
ROM
DMA
Communication prescaler
UART
I/O expansion serial
interface
× 2 channels
A/D converter
(10-bit)
IN0, IN1
OUT0, OUT1,
OUT2, OUT3,
OUT4, OUT5
8
P90
P97
CS0, CS1,
CS2, CS3
4
PA0
PA3
8
2
X0, X1, RST
X0A, X1A
MD2, MD1, MD0
SIN0
SOT0
SCK0
SIN1, SIN2
SOT1, SOT 2
SCK1, SCK2
AVCC
AVRH
AVSS
ADTG
AN0 to AN7
AIN0, AIN1
BIN0, BIN1
ZIN0, ZIN1
PWC0
PWC1
PWC2
PPG0, PPG1
PPG2, PPG3
PPG4, PPG5
IRQ0 to IRQ7
8
EXTC
MT00
MT01
TIN0
TOT0
SCL
SDA
PG
Chip select
16-bit reload timer
I2C interface
External interrupt
I/O ports
Input/output timer
16-bit input capture
× 2
16-bit output compare
× 6
16-bit free-run timer
CPU
FMC-16LX
series core
Interrupt controller
8/16-bit PPG
8/16-bit
up/down counter
16-bit PWC
3 channels
F
2
MC-16LX
BUS
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參數(shù)描述
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