MB90520A/520B Series
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6.
16-bit I/O Timers
The 16-bit I/O timers consist of a two-channel 16-bit freerun timer, two-channel input capture, and eight-channel
output compare. The output compare channels can be used to generate eight independent waveform outputs
based on the 16-bit freerun timer. The input capture channels can be used to measure input pulse widths and
external clock periods.
Structure of I/O timers in the MB90520A/520B series
16-bit freerun timer functions
The count value for the 16-bit freerun timer sets the base time for the input capture and output compare
functions.
An interrupt can be generated when the 16-bit freerun timer overflows.
Extended intelligent I/O service (EI2OS) can be generated.
16-bit freerun timers 0 and 1 can be cleared to “0000H” when an external reset is input, on setting the timer
clear bit (TCCS : CLR
= 1) , and when a compare match occurs on output compare 0 to 4.
The count clock frequency can be selected from the following four clocks :
4/
φ (250 ns) , 16/φ (1.0 s) , 64/φ (4.0 s) , 256/φ (16.0 s)
Note :
φ is the machine clock frequency. The values in ( ) are for 16 MHz machine clock.
Input capture functions
The input capture saves the value of the 16-bit freerun timer and generates an interrupt request when the
specified edge is detected on the trigger input from the external trigger input pin (IC00 or IC01/IC10 or IC11) .
Input capture channels 0 and 1 can perform input capture and generate interrupt request independently.
Extended intelligent I/O service (EI2OS) can be generated.
Detection of rising edges, falling edges, or either edge can be selected as the trigger edge.
When using input capture 0, either the IC00 or IC01 pin can be used. Note, however, that masking one pin
only is not possible.
When using input capture 1, either the IC10 or IC11 pin can be used. Note, however, that masking one pin
only is not possible.
Output compare functions
The output compare channels compare the values set in output compare registers 0 to 7 with the 16-bit freerun
timers 0 and 1 count values and invert the level of the corresponding output compare pin and clear the 16-bit
freerun timer to “0000H” when a match is detected.
Extended intelligent I/O service (EI2OS) can be generated.
The initial output levels at the output compare pins can be set after the microcontroller boots.
The output levels from the eight output compare channels are controlled independently. Similarly, interrupt
requests are also generated independently by each channel.
16-bit Freerun Timer
Output Compare
Input Capture
16-bit I/O timer
(unit 0)
16-bit freerun timer 0
Output compare 0 to 3
(unit 0)
Input capture 0 and 1
(unit 0)
16-bit I/O timer
(unit 1)
16-bit freerun timer 1
Output compare 4 to 8
(unit 1)