- 您現(xiàn)在的位置：買(mǎi)賣IC網(wǎng) > PDF目錄69021 > MB90523APFF 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP120 PDF資料下載
參數(shù)資料
| 型號(hào)： | MB90523APFF |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP120 |
| 封裝： | PLASTIC, LQFP-120 |
| 文件頁(yè)數(shù)： | 55/99頁(yè) |
| 文件大?。?/td> | 978K |
| 代理商： | MB90523APFF |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)當(dāng)前第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)
MB90520A/520B Series
59
11. Wakeup Interrupts
The wakeup interrupt function detects wakeup interrupt requests from external devices by detecting “L” levels
input to the wakeup interrupt input pins (WI0 to WI7) and passes these to the CPU for interrupt processing.
Wakeup interrupts can be used to wakeup the microcontroller from standby mode. (However, wakeup interrupts
cannot be used to recover from hardware standby mode.)
Not supported by the extended intelligent I/O service (EI2OS) .
Wakeup interrupt functions
Block diagram
Function and Control
Input pins
8 channels (8 pins : WI0 to WI7)
Interrupt trigger
“L” level inputs. One interrupt flag is shared by all eight channels.
Interrupt control
Interrupt requests can be enabled or disabled in the wakeup interrupt control
register (EICR) .
Interrupt flag
Interrupt requests are stored in the wakeup interrupt flag register (EIFR) .
EI2OS support
Not supported by the extended intelligent I/O service (EI2OS) .
WIF
EN7 EN6 EN5 EN4 EN3 EN2 EN1 EN0
WI0
WI1
WI2
WI3
WI4
WI5
WI6
WI7
Internal data bus
Wakeup interrupt
control register (EICR)
Wakeup interrupt
flag register (EIFR)
Interrupt request detection circuit
Pin
Wakeup
interrupt request
: Undefined
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB90522BPFV | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP120 |
| MB90522APFV | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP120 |
| MB90523APFV | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP120 |
| MB90522BPFF | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP120 |
| MB90F546GSPFR | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB90523APFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90523B | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90523PFF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90523PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90540 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。