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MB90340E Series
22
■
HANDLING DEVICES
1.
Preventing latch-up
CMOS IC may suffer latch
-
up under the following conditions:
A voltage higher than V
CC
or lower than V
SS
is applied to an input or output pin.
A voltage higher than the rated voltage is applied between V
CC
and V
SS
pins.
The AV
CC
power supply is applied before the V
CC
voltage.
Latch-up may increase the power supply current drastically, causing thermal damage to the device.
For the same reason, also be careful not to let the analog power-supply voltage (AV
CC
, AVRH) exceed the digital
power-supply voltage.
Handling unused pins
2.
Leaving unused input terminals open may lead to permanent damage due to malfunction and latch-up; pull up
or pull down the terminals through the resistors of 2 k
or more.
Power supply pins (V
CC
/V
SS
)
If there are multiple V
CC
and V
SS
pins, from the point of view of device design, pins to be of the same potential
are connected inside of the device to prevent malfunction such as latch-up.
To reduce unnecessary radiation, prevent malfunctioning of the strobe signal due to the rise of ground level,
and observe the standard for total output current, be sure to connect the V
CC
and V
SS
pins to the power supply
and ground externally.
Connect V
CC
and V
SS
pins to the device from the current supply source at a possibly low impedance.
As a measure against power supply noise, it is recommended to connect a capacitor of about 0.1
μ
F as a
bypass capacitor between V
CC
and V
SS
pins in the vicinity of V
CC
and V
SS
pins of the device.
3.
4.
Mode Pins (MD0 to MD2)
Connect the mode pins directly to V
CC
or V
SS
pins. To prevent the device unintentionally entering test mode due
to noise, lay out the printed circuit board so as to minimize the distance from the mode pins to V
CC
or V
SS
pins
and to provide a low-impedance connection.
Vcc
Vss
Vss
Vcc
Vss
Vcc
MB90340E
Series
Vcc
Vss
Vcc
Vss