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參數(shù)資料
| 型號： | MB90F349ESPF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller CMOS |
| 中文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 20 X 14 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 18/85頁 |
| 文件大?。?/td> | 1169K |
| 代理商： | MB90F349ESPF |
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MB90340E Series
18
(Continued)
Pin No.
Pin name
I/O
Circuit
type*
3
Function
QFP100*
1
LQFP100*
2
86
84
P11
G
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled in
single-chip mode.
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
Output pin for the reload timer
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
Serial data input pin for UART3
External interrupt request input pin
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
Serial data output pin for UART3
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
Clock I/O pin for UART3
Power (3.5 V to 5.5 V) input pin
GND pin
Main clock output pin
Main clock input pin
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
AD09
TOT1
87
85
P12
N
AD10
SIN3
INT11R
88
86
P13
G
AD11
SOT3
89
87
P14
G
AD12
SCK3
V
CC
V
SS
X1
X0
90
91
92
93
88
89
90
91
A
94
92
P15
G
AD13
95
93
P16
G
AD14
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