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參數(shù)資料
| 型號： | MB90F357EPMC |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontrollers |
| 中文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 7/85頁 |
| 文件大?。?/td> | 880K |
| 代理商： | MB90F357EPMC |
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MB90350E Series
7
MASK ROM products/Evaluation products
Part Number
(Continued)
Parameter
Type
CPU
MB90351E,
MB90352E
MB90351TE,
MB90352TE
MB90351ES,
MB90352ES
MB90351TES,
MB90352TES
MB90V340E-
101
MB90V340E-
102
MASK ROM products
Evaluation products
F
2
MC-16LX CPU
System clock
PLL clock multiplication circuit (
×
1,
×
2,
×
3,
×
4,
×
6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (oscillation clock 4 MHz, PLL
×
6)
MASK ROM
64 Kbytes : MB90351E(S), MB90351TE(S)
128 Kbytes :MB90352E(S), MB90352TE(S)
4 Kbytes
ROM
External
RAM
Emulator-specific
power supply*
Sub clock pin
(X0A, X1A)
(Max 100 kHz)
Clock supervisor
Low voltage/CPU
operation detection
reset
30 Kbytes
Yes
Yes
No
No
Yes
No
No
Yes
No
Yes
No
Operating
voltage range
3.5 V to 5.5 V : at normal operating (not using A/D converter)
4.0 V to 5.5 V : at using A/D converter
4.5 V to 5.5 V : at using external bus
5 V
±
10
%
Operating
temperature range
Package
40
°
C to
+
125
°
C
LQFP-64
2 channels
PGA-299
5 channels
UART
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
1 channel
15 channels
10-bit or 8-bit resolution
Conversion time : Min 3
μ
s includes sample time (per one channel)
2 channels
Operation clock frequency : fsys/2
1
, fsys/2
3
, fsys/2
5
(fsys
=
Machine clock frequency)
Supports External Event Count function.
I
2
C (400 kbps)
2 channels
24 channels
A/D converter
16-bit reload timer
4 channels
16-bit I/O timer
(2 channels)
I/O Timer 0 (clock input FRCK0) corresponds to ICU0/1.
I/O Timer 1 (clock input FRCK1) corresponds to
ICU4/5/6/7, OCU4/5/6/7.
I/O Timer 0 corresponds to
ICU0/1/2/3, OCU0/1/2/3.
I/O Timer 1 corresponds to
ICU4/5/6/7, OCU4/5/6/7.
Signals an interrupt when overflowing.
Supports Timer Clear when it matches Output Compare (ch.0, ch.4) .
Operation clock frequency : fsys, fsys/2
1
, fsys/2
2
, fsys/2
3
, fsys/2
4
, fsys/2
5
, fsys/2
6
, fsys/2
7
(fsys
=
Machine clock frequency)
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