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參數(shù)資料
| 型號(hào)： | MB90F457S |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁(yè)數(shù)： | 22/78頁(yè) |
| 文件大小： | 680K |
| 代理商： | MB90F457S |
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MB90455 Series
22
(Continued)
: Available
: Unavailable
: Available El
2
OS function is provided.
: Available when a cause of interrupt sharing a same ICR is not used.
*1:
Peripheral functions sharing an ICR register have the same interrupt level.
If peripheral functions share an ICR register, only one function is available when using expanded intelligent
I/O service (EI
2
OS) .
If peripheral functions share an ICR register, a function using expanded intelligent I/O service (EI
2
OS) does
not allow interrupt by another function.
*2: Input capture 1 is ready only for EI
2
OS, and PPG is not ready for EI
2
OS. Disable PPG interrupt when using
EI
2
OS with Input capture 1.
*3: Priority when two or more interrupts of a same level occur simultaneously.
Cause of interrupt
EI
2
OS
readiness
Interrupt vector
Interrupt control register
Priority*
3
Number
Address
ICR
Address
UART1 reception completed
#37
25
H
FFFF68
H
ICR13
0000BD
H
*
1
High
↑
UART1 transmission completed
×
×
×
#38
26
H
FFFF64
H
Reserved
#39
27
H
FFFF60
H
ICR14
0000BE
H
Reserved
#40
28
H
FFFF5C
H
Flash memory
#41
29
H
FFFF58
H
ICR15
0000BF
H
Delay interrupt generation
module
#42
2A
H
FFFF54
H
↓
Low
×
×
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