參數(shù)資料
型號: MB90F457SPMT
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: Octal Registered Transceiver With 3-State Outputs 24-CDIP -55 to 125
中文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 24/78頁
文件大?。?/td> 680K
代理商: MB90F457SPMT
MB90455 Series
24
Port 2 pins block diagram (general-purpose input/output port)
Port 2 registers
Port 2 registers include port 2 data register (PDR2) and port 2 direction register (DDR2).
The bits configuring the register correspond to port 2 pins on a one-to-one basis.
Relation between port 2 registers and pins
Port name
Bits of register and corresponding pins
Port 2
PDR2,DDR2
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Corresponding pins
P27
P26
P25
P24
P23
P22
P21
P20
Pch
Nch
Peripheral
function input
Peripheral
function output
Port data register (PDR)
PDR read
Output latch
PDR write
Peripheral function
output permission
Pin
Port direction register (DDR)
Direction
latch
DDR write
DDR read
Standby control (SPL=1)
Standby control : Control among Stop mode (SPL=1), Time-base timer mode (SPL=1), and clock mode
(SPL=1).
I
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