![](http://datasheet.mmic.net.cn/330000/MB90487PFV_datasheet_16437531/MB90487PFV_10.png)
MB90480/485 Series
10
(Continued)
Pin No.
LQFP*
1
QFP*
2
Pin name
Circuit
type
Function
22
24
P45
A13
P45
A13
EXTC*
3
P46, P47
A14, A15
OUT4/
OUT5
F
(CMOS)
MB90480
series
This is a general purpose I/O port.
In non-multiplex mode, this pin functions as an external address pin.
This is a general purpose I/O port.
In non-multiplex mode, this pin functions as an external address pin.
μ
PG input pin (MB90485 series only) .
This is a general purpose I/O port.
In non-multiplex mode, this pin functions as an external address pin.
G
(CMOS/
H)
MB90485
series
23
24
25
26
F
(CMOS)
Output compare event output pins.
68
70
P50
D
(CMOS)
This is a general purpose I/O port. In external bus mode, this pin functions as
the ALE pin.
In external bus mode, this pin functions as the address load enable (ALE) sig-
nal pin.
This is a general purpose I/O port. In external bus mode, this pin functions as
the RD pin.
In external bus mode, this pin functions as the read strobe output (RD) signal
pin.
This is a general purpose I/O port. In external bus mode, when the WRE pin
in the EPCR register is set to “1”, this pin functions as the WRL pin.
In external bus mode, this pin functions as the lower data write strobe output
(WRL) pin. When the WRE bit in the EPCR register is set to “0”, this pin func-
tions as a general purpose I/O port.
This is a general purpose I/O port. In external bus mode with 16-bit bus width,
when the WRE bit in the EPCR register is set to “1”, this pin functions as the
WRH pin.
In external bus mode with 16-bit bus width, this pin
functions as the upper data write strobe output (WRH) pin. When the WRE bit
in the EPCR register is set to “0”, this pin functions as a general purpose I/O
port.
This is a general purpose I/O port. In external bus mode, when the HDE bit in
the EPCR register is set to “1”, this pin functions as the HRQ pin.
In external bus mode, this pin functions as the hold request input (HRQ) pin.
When the HDE bit in the EPCR register is set to “0”, this pin functions as a gen-
eral purpose I/O port.
This is a general purpose I/O port. In external bus mode, when the HDE bit in
the EPCR register is set to “1”, this pin functions as the HAK pin.
In external bus mode, this pin functions as the hold
acknowledge (HAK) pin. When the HDE bit in the EPCR register is set to “0”,
this pin functions as a general purpose I/O port.
ALE
69
71
P51
D
(CMOS)
RD
70
72
P52
D
(CMOS)
WRL
71
73
P53
D
(CMOS)
WRH
72
74
P54
D
(CMOS)
HRQ
73
75
P55
D
(CMOS)
HAK