參數(shù)資料
型號: MB90F543
廠商: Fujitsu Limited
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16位微控制器專有
文件頁數(shù): 12/67頁
文件大?。?/td> 746K
代理商: MB90F543
MB90540/540G/545/545G Series
12
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP
*2
QFP
*1
46
48
P57
D
General I/O port. This function is enabled when the 16-bit
reload timers 0 disables the output.
TOT0
Output pin for the 16-bit reload timers 0. This function is
enabled when the 16-bit reload timers 0 enables the output.
51 to 56
53 to 58
P70 to P75
D
General I/O ports. This function is always enabled.
IN0 to IN5
Trigger input pins for input captures ICU0 to ICU5. Set the cor-
responding Port Direction Register to input if this
function is used.
57 , 58
59 , 60
P76 , P77
D
General I/O ports. This function is enabled when the OCU
disables the waveform output.
OUT2 , OUT3
Event output pins for output compares OCU2 and OCU3. This
function is enabled when the OCU enables the waveform out-
put.
IN6 , IN7
Trigger input pins for input captures ICU6 and ICU7. Set the
corresponding Port Direction Register to input and disable the
OCU waveform output if this function is used.
59 , 62
61 to 64
P80 to P83
D
General I/O ports. This function is enabled when 8/16-bit PPG
disables the waveform output.
PPG0 to
PPG3
Output pins for 8/16-bit PPGs. This function is enabled when
8/16-bit PPG enables the waveform output.
63 , 64
65 , 66
P84 , P85
D
General I/O ports. This function is enabled when the OCU
disables the waveform output.
OUT0 , OUT1
Waveform output pins for output compares OCU0 and OCU1.
This function is enabled when the OCU enables the waveform
output.
65
67
P86
D
General I/O port. This function is always enabled.
TIN1
Input pin for the 16-bit reload timers 1. Set the
corresponding Port Direction Register to input if this function is
used.
66
68
P87
D
General I/O port. This function is enabled when the 16-bit
reload timers 0 disables the output.
TOT1
Output pin for the 16-bit reload timers 1.This function is
enabled when the 16-bit reload timers 1 enables the output.
67 to 70
69 to 72
P90 to P93
D
General I/O port. This function is always enabled.
INT0 to INT3
External interrupt request input pins for INT0 to INT3. Set the
corresponding Port Direction Register to input if this function is
used.
71
73
P94
D
General I/O port. This function is enabled when CAN0 disables
the output.
TX0
TX output pin for CAN0. This function is enabled when CAN0
enables the output.
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