參數(shù)資料
型號: MB90F598GPF
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 12/52頁
文件大?。?/td> 657K
代理商: MB90F598GPF
MB90595/595G Series
2
s FEATURES
Clock
Embedded PLL clock multiplication circuit
Operating clock (PLL clock) can be selected from divided-by-2 of oscillation or one to four times the oscillation
(at oscillation of 4 MHz, 4 MHz to 16 MHz).
Minimum instruction execution time: 62.5 ns (operation at oscillation of 4 MHz, four times the oscillation clock,
VCC of 5.0 V)
Instruction set to optimize controller applications
Rich data types (bit, byte, word, long word)
Rich addressing mode (23 types)
Enhanced signed multiplication/division instruction and RETI instruction functions
Enhanced precision calculation realized by the 32-bit accumulator
Instruction set designed for high level language (C language) and multi-task operations
Adoption of system stack pointer
Enhanced pointer indirect instructions
Barrel shift instructions
Program patch function (for two address pointers)
Enhanced execution speed: 4-byte instruction queue
Enhanced interrupt function: 8 levels, 34 factors
Automatic data transmission function independent of CPU operation
Extended intelligent I/O service function (EI2OS): Up to 10 channels
Embedded ROM size and types
Mask ROM: 128 Kbytes
Flash ROM: 128 Kbytes
Embedded RAM size: 4 Kbytes (MB90V595/595G: 6 Kbytes)
Flash ROM
Supports automatic programming, Embedded Algorithm TM*
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Hard-wired reset vector available in order to point to a fixed boot sector
Erase can be performed on each block
Block protection with external programming voltage
Low-power consumption (stand-by) mode
Sleep mode (mode in which CPU operating clock is stopped)
Stop mode (mode in which oscillation is stopped)
CPU intermittent operation mode
Hardware stand-by mode
Process: 0.5
m CMOS technology
I/O port
General-purpose I/O ports: 78 ports
Push-pull output and Schmitt trigger input.
Programmable on each bit as I/O or signal for peripherals.
Timer
Watchdog timer: 1 channel
8/16-bit PPG timer: 8/16-bit
× 6 channels
16-bit re-load timer: 2 channels
(Continued)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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