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參數(shù)資料
| 型號： | MB90F884APMC |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-Bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 49/75頁 |
| 文件大小： | 1083K |
| 代理商： | MB90F884APMC |
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MB90880 Series
49
3
.6
2.7
3
.0
4
1.5
16
33
16
12
25
24
8
6
4
3
4
8
12.5
16
Source oscillator clock F
CH
(MHz)
25
20
3
2
50
20
1
8
1.5
9
56
10
40
33
S
C
Normal operating range
Internal clock f
CP
(MHz) *
4
Internal operating clock frequency vs. Supply voltage
PLL warranted operating range
Source oscillator frequency vs. Internal operating clock frequency
I
C
4
PLL warranted operating range
Notes:
Use the f
CP
at 4 MHz or higher only for PLL1 multiplication.
For A/D operating frequencies, refer to “5. A/D Converter electrical characteristics”.
*1 :
When using the internal clock at “20 MHz
<
f
CP
≤
25 MHz” in PLL1, 2, 3 or 4 multiplication setting, set both of
the DIV2 and PLL2 bits to “1” in the PLLOS register.
Example :
When the source oscillator frequency is 24 MHz in PLL1 multiplication :
CKSCR register : CS1
=
“0”, CS0
=
“0”
PLLOS register : DIV2
=
“1”, PLL2
=
“1”
Example :
When the source oscillator frequency is 6 MHz in PLL3 multiplication :
CKSCR register : CS1
=
“1”, CS0
=
“0”
PLLOS register : DIV2
=
“1”, PLL2
=
“1”
When using the internal clock at “20 MHz
<
f
CP
≤
25 MHz” in PLL 2 or 4 multiplication setting, the following
settings can also be used.
PLL2 multiplication : CKSCR register : CS1
=
“0”, CS0
=
“0”
PLLOS register : DIV2
=
“0”, PLL2
=
“1”
PLL4 multiplication CKSCR register : CS1
=
“0”, CS0
=
“1”
PLLOS register : DIV2
=
“0”, PLL2
=
“1”
When using the PLL6 or 8 multiplication setting, set DIV2 to “0” and PLL2 to “1” in the PLLOS register.
Example :
When the source oscillator frequency is 4 MHz in PLL6 multiplication :
CKSCR register : CS1
=
“1”, CS0
=
“0”
PLLOS register : DIV2
=
“0”, PLL2
=
“1”
Example :
When the source oscillator frequency is 3 MHz in PLL8 multiplication :
CKSCR register : CS1
=
“1”, CS0
=
“1”
PLLOS register : DIV2
=
“0”, PLL2
=
“1”
The maximum operating frequency of MB90F883(S) and MB90F884(S) is 25 MHz.
*2 :
*3 :
*4 :
8 Multi-
plication*
3
No multiplication
6 Multi-
plica-
tion*
3
3 Multi-
plication*
1
4 Multi-
plica-
tion
*
1,
*
2
2 Multi-
plication*
1,
*
2
1 Multiplication*
1
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