參數(shù)資料
型號(hào)： MB90F922NCPMC
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP120
封裝： 16 X 16 MM, 1.70 MM HEIGHT, 0.50 M PITCH, PLASTIC, LQFP-120
文件頁(yè)數(shù)： 50/72頁(yè)
文件大?。?/td> 2151K
代理商： MB90F922NCPMC
MB90920 Series
54
DS07-13750-3E
Bit setting: ESCR0/1/2/3:SCES=1, ECCR0/1/2/3:SCDE=0
(VCC
= 5.0 V±10%, VSS = AVSS = 0.0 V, TA = 40 °C to +105 °C)
Notes :
Depending on the machine clock frequency to be used, the maximum baud rate may be limited by some
parameters. These parameters are shown in “MB90920 series hardware manual”.
CL is the load capacitance connected to the pin during testing.
tCP is the internal operating clock cycle time. Refer to “ (1) Clock timing”.
Parameter
Symbol
Pin name
Conditions
Value
Unit
Min
Max
Serial clock cycle time
tSCYC
SCK0 to SCK3
Internal shift clock
mode output pin
CL
= 80 pF + 1TTL
5 tCP
ns
SCK
↑ → SOT delay time
tSHOVI
SCK0 to SCK3,
SOT0 to SOT3
50
+ 50
ns
Valid SIN
→ SCK ↓
tIVSLI
SCK0 to SCK3,
SIN0 to SIN3
tCP
+ 80
ns
SCK
↓ → valid SIN hold time
tSLIXI
0
ns
Serial clock “H” pulse width
tSHSL
SCK0 to SCK3
External shift clock
mode output pin
CL
= 80 pF + 1TTL
3 tCP
tR
ns
Serial clock “L” pulse width
tSLSH
tCP
+ 10
ns
SCK
↑ → SOT delay time
tSHOVE
SCK0 to SCK3,
SOT0 to SOT3
2 tCP
+ 60
ns
Valid SIN
→ SCK ↓
tIVSLE
SCK0 to SCK3,
SIN0 to SIN3
30
ns
SCK
↓ → valid SIN hold time
tSLIXE
tCP
+ 30
ns
SCK
↓ time
tF
SCK0 to SCK3
10
ns
SCK
↑ time
tR
10
ns
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