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參數(shù)資料
| 型號： | MB90P214PF |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 93/100頁 |
| 文件大?。?/td> | 1681K |
| 代理商： | MB90P214PF |
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MB90210 Series
92
Table 22
Miscellaneous Control Types (Byte, Word, Long) [36 Instructions]
Note: For (a) and (c), refer to “Table 4 Number of Execution Cycles in Addressing Modes” and “Table 5 Correction
Values for Number of Cycles for Calculating Actual Number of Cycles.”
*1: PCB, ADB, SSB, USB, and SPB : 1 state
DTB
: 2 states
DPR
: 3 states
*2: 3 + 4
× (number of POPs)
*3: 3 + 4
× (number of PUSHes)
*4: (Number of POPs)
× (c), or (number of PUSHes) × (c)
*5: Set to 3 when AL is 0, 5 when AL is not 0.
*6: Set to 4 when AL is 0, 6 when AL is not 0.
*7: Set to 5 when AL is 0, 7 when AL is not 0.
Mnemonic
#
~
B
Operation
LH AH
IS
T
N
Z
V C RMW
PUSHW A
PUSHW AH
PUSHW PS
PUSHW rlst
POPW
A
POPW
AH
POPW
PS
POPW
rlst
JCTX
@A
AND
CCR, #imm8
OR
CCR, #imm8
MOV
RP, #imm8
MOV
ILM, #imm8
MOVEA RWi, ear
MOVEA RWi, eam
MOVEA A, ear
MOVEA A, eam
ADDSP #imm8
ADDSP #imm16
MOV
A, brgl
MOV
brg2, A
MOV
brg2, #imm8
NOP
ADB
DTB
PCB
SPB
NCC
CMR
MOVW SPCU, #imm16
MOVW SPCL, #imm16
SETSPC
CLRSPC
BTSCN A
BTSCNS
A
BTSCND
A
1
2
1
2
1
2
2 +
2
2 +
2
3
2
3
1
4
2
3
*3
3
*2
9
3
2
3
2 + (a)
2
1 + (a)
3
*1
1
2
1
2
*5
*6
*7
(c)
*4
(c)
*4
6
× (c)
0
word (SP)
← (SP) – 2, ((SP)) ← (A)
word (SP)
← (SP) – 2, ((SP)) ← (AH)
word (SP)
← (SP) – 2, ((SP)) ← (PS)
(PS)
← (PS) – 2n, ((SP)) ← (rlst)
word (A)
← ((SP)), (SP) ← (SP) + 2
word (AH)
← ((SP)), (SP) ← (SP) + 2
word (PS)
← ((SP)), (SP) ← (SP) + 2
(rlst)
← ((SP)), (SP) ← (SP) + 2n
Context switch instruction
byte (CCR)
← (CCR) and imm8
byte (CCR)
← (CCR) or imm8
byte (RP)
← imm8
byte (ILM)
← imm8
word (RWi)
← ear
word (RWi)
← eam
word(A)
← ear
word (A)
← eam
word (SP)
← (SP) + ext (imm8)
word (SP)
← (SP) + imm16
byte (A)
← (brgl)
byte (brg2)
← (A)
byte (brg2)
← imm8
No operation
Prefix code for accessing AD space
Prefix code for accessing DT space
Prefix code for accessing PC space
Prefix code for accessing SP space
Prefix code for no change in flag
Prefix for common register bank
word (SPCU)
← (imm16)
word (SPCL)
← (imm16)
Enables stack check operation.
Disables stack check operation.
Bit position of 1 in byte (A) from word (A)
Bit position (
× 2) of 1 in byte (A) from word (A)
Bit position (
× 4) of 1 in byte (A) from word (A)
–
Z
–
Z
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
*
–
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