
MB90670/675 Series
56
8. Output Compare (OCU)
The output compare (OCU) is two sets of compare units consisting of four-channel OCU compare data registers,
a comparator and a control register.
An interrupt request can be generated for each channel upon a match detection by performing time-division
comparison between the OCU compare data register setting value and the counter value of the 24-bit free-run
timer.
The DOT pin can be used as a waveform output pin for reversing output upon a match detection or a general-
purpose output port for directly outputting the setting value of the DOT bit.
(1) Register Configuration
(Continued)
Initial value
11110000
B
—
—
—
—
MD3
MD2
MD1
MD0
(CCR00 : L)
OCU control register 00 upper digits (CCR00 : H)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7. . . . .. . . . . . ..
—
—
—
—
R/W
R/W
R/W
R/W
Address
000059
H
Initial value
- - - -0000
B
RESV
RESV RESV
RESV
CPE3
CPE2
CPE1
CPE0
(CCR00 : H)
OCU control register 00 lower digits (CCR00 : L)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15.. . . . . . .. . . .
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
000058
H
Initial value
00000000
B
ICE3
ICE2
ICE1
ICE0
IC3
IC2
IC1
IC0
(CCR01 : L)
OCU control register 01 upper digits (CCR01 : H)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7. . .. . . . . . .. . .
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
00005B
H
Initial value
- - - -0000
B
—
—
—
—
DOT3
DOT2
DOT1
DOT0
(CCR01 : H)
OCU control register 01 lower digits (CCR01 : L)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15.. . . . . . .. . . .
—
—
—
—
R/W
R/W
R/W
R/W
Address
00005A
H
R/W : Readable and writable
— : Unused