![](http://datasheet.mmic.net.cn/330000/MB90P224BPF_datasheet_16438137/MB90P224BPF_26.png)
MB90220 Series
26
(Continued)
Address
Register
Register
name
Access
Resouce
name
Initial value
000023
H
Rate and data register 0
URD0
R/W
UART0 (ch.0)
0 0 0 0 0 0 0 X
000024
H
Mode control register 1
UMC1
R/W
UART0 (ch.1)
0 0 0 0 0 1 0 0
000025
H
Status register 1
USR1
R/W
0 0 0 1 0 0 0 0
000026
H
Input data register 1
/output data register 1
UIDR1
/UODR1
R/W
XXXXXXXX
000027
H
Rate and data register 1
URD1
R/W
0 0 0 0 0 0 0 X
000028
H
Mode control register 2
UMC2
R/W
UART0 (ch.2)
0 0 0 0 0 1 0 0
000029
H
Status register 2
USR2
R/W
0 0 0 1 0 0 0 0
00002A
H
Input data register 2
/output data register 2
UIDR2
/UODR2
R/W
XXXXXXXX
00002B
H
Rate and data register 2
URD2
R/W
0 0 0 0 0 0 0 X
00002C
H
UART CTS control register
UCCR
R/W
UART0 (ch.0)
– – – 0 0 0 – –
00002D
H
(Reserved area)
*1
00002E
H
Mode register
SMR
R/W
UART1
0 0 0 0 0 0 0 0
00002F
H
Control register
SCR
R/W
0 0 0 0 0 1 0 0
000030
H
Input data register
/output data register
SIDR
/SODR
R/W
XXXXXXXX
000031
H
Status register
SSR
R/W
0 0 0 0 1 – 0 0
000032
H
A/D channel setting register
ADCH
R/W
10-bit A/D
converter
0 0 0 0 0 0 0 0
000033
H
A/D mode register
ADMD
R/W
– – – X0 0 0 0
000034
H
A/D control status register
ADCS
R/W
0 0 0 0 – – 0 0
000035
H
(Reserved area)
*1
000036
H
A/D data register
ADCD
R
10-bit A/D
converter
XXXXXXXX
000037
H
0 0 0 0 0 0 XX
000038
H
(Reserved area)
*1
000039
H
00003A
H
DTP/interrupt enable register
ENIR
R/W
DTP/external
interrupt
0 0 0 0 0 0 0 0
00003B
H
DTP/interrupt source register
EIRR
R/W
0 0 0 0 0 0 0 0
00003C
H
Request level setting register
ELVR
R/W
0 0 0 0 0 0 0 0
00003D
H
0 0 0 0 0 0 0 0
00003E
H
to 3F
H
(Reserved area)
*1
000040
H
Timer control status register 0
TMCSR0
R/W
16-bit reload
timer 0
0 0 0 0 0 0 0 0
000041
H
– – – – 0 0 0 0