參數(shù)資料
型號(hào): MB91108PFV
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP120
封裝: PLASTIC, LQFP-120
文件頁(yè)數(shù): 13/96頁(yè)
文件大?。?/td> 1342K
代理商: MB91108PFV
MB91107/108
20
Condition code register (CCR)
System condition code register (SCR)
Interrupt level mask register (ILM)
S-flag
: Specifies a stack pointer used as R15.
I-flag
: Controls user interrupt request enable/disable.
N-flag
: Indicates sign bit when division result is assumed to be in the 2’s complement format.
Z-flag
: Indicates whether or not the result of division was “0”.
V-flag
: Assumes the operand used in calculation in the 2’s complement format and indicates whether or
not overflow has occurred.
C-flag
: Indicates if a carry or borrow from the MSB has occurred.
T-flag : Specifies whether or not to enable step trace trap.
ILM4 to ILM0 : Register for holding interrupt level mask value. The value held by this register is used as a
level mask. When an interrupt request issued to the CPU is higher than the level held by ILM,
the interrupt request is accepted.
ILM4
ILM3
ILM2
ILM1
ILM0
Interrupt level
High-low
00000
0
High
01111
15
11111
31
Low
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