參數(shù)資料
型號(hào): MB91302APFF-G-001-BNDE1
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, MROM, 68 MHz, RISC MICROCONTROLLER, PQFP144
封裝: 0.40 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù): 46/96頁
文件大?。?/td> 2641K
代理商: MB91302APFF-G-001-BNDE1
MB90520B Series
58
DS07-13707-5E
10. DTP (Data Transfer Peripheral) /External Interrupt Circuit
The DTP/external interrupt function detects interrupt requests and data transfer requests input from external
devices and passes these to the CPU as external interrupt requests. This block can also activate the extended
intelligent I/O service (EI2OS) .
DTP/external interrupt functions
External Interrupt
DTP Function
Input pins
8 channels (INT0 to INT7)
Interrupt
conditions
Can be set independently for each channel (each pin) in the detection level setup register
(ELVR) .
“H” level, “L” level,
rising edge, or falling edge input
“H” level or “L” level input
Interrupt control
Interrupts can be enabled or disabled in the DTP/external interrupt enable register (ENIR) .
Interrupt flag
The DTP/external interrupt request register (EIRR) stores interrupt requests.
Processing
selection
Set EI2OS to be disabled (ICR : ISE
= 0)
Set EI2OS to be enabled (ICR : ISE
= 1)
Interrupt
execution
Jumps to interrupt handler routine
Jumps to interrupt handler routine after
automatic data transfer by EI2OS completes.
EI2OS support
Supports the extended intelligent I/O service (EI2OS)
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