參數(shù)資料
型號： MB91306RPFV
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 66 MHz, RISC MICROCONTROLLER, PQFP120
封裝： 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-120
文件頁數(shù)： 68/100頁
文件大?。?/td> 2164K
代理商： MB91306RPFV
MB91307 Series
DS07-16314-3E
7
(Continued)
Pin no.
Pin name
I/O
circuit type
Description
38
SDA
Q
I2C bus input/output port. This function is valid when I2C operation is en-
abled. When the I2C bus is in use, the port output must be set to Hi-Z
level. When the I2C bus is in use, this is an open drain pin.
PH6
General purpose input/output port.
39
SCL
Q
I2C bus input/output port. This function is valid when I2C operation is en-
abled. When the I2C bus is in use, the port output must be set to Hi-Z
level. When the I2C bus is in use, this is an open drain pin.
PH7
General purpose input/output port.
40
DREQ2
F
DMA external transfer request input. When selected as a DMA startup
source, this input is in use at all times, so that output from other functions
must be stopped unless used intentionally.
PG0
General purpose input/output port.
41
DACK2
F
DMA external transfer request acknowledge output. This function is valid
when the DMA transfer request acknowledge output setting is enabled.
PG1
General purpose input/output port. This function is valid when the DMA
transfer request acknowledge output setting is enabled.
42
DEOP2
F
DMA external transfer end output. This function is valid when the DMA
external transfer end output setting is enabled.
DSTP2
DMA external transfer stop input. This function is valid when the DMA ex-
ternal transfer stop input setting is enabled.
PG2
General purpose input/output port. This function is valid when the DMA
external transfer end output selection and the DMA external transfer stop
input selection are disabled.
43 to 45
MD2 to MD0
G
Mode pins 2 to 0. The setting of these two pins determines the basic
operating mode. They should be connected to Vcc or Vss.
46
DREQ0
F
DMA external transfer request input. When selected as a DMA startup
source, this input is in use at all times, so that output from other functions
must be stopped unless used intentionally.
PB0
General purpose input/output port.
47
DACK0
F
DMA external transfer request acknowledge output. This function is valid
when the DMA transfer request acknowledge output setting is enabled.
PB1
General purpose input/output port. This function is enabled when the
DMA transfer request acknowledge output setting is disabled.
48
DEOP0
F
DMA external transfer end output. This function is valid when the DMA
external transfer end output setting is enabled.
DSTP0
DMA external transfer stop input. This function is valid when the DMA ex-
ternal transfer stop input setting is enabled.
PB2
General purpose input/output port. This function is valid when the DMA
external transfer end output selection and the DMA external transfer stop
input selection are disabled.
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